Using DMA to service externel peripherals(FIFO) in PXA255 Processor

Do you have a question? Post it now! No Registration Necessary

Translate This Thread From English to

Threaded View
I've been trying to transfer data from external memory(SDRAM) to
companion chip(FIFO) using DMA.

It was possible to transfer data from external memory to external
memory using DMA, but I can't
if I try to transfer data to FIFO (I always get Bus Error Interrupt
from DCSR)

FIFO range is set at 4th static memory bank.
FIFO's bandwidth is set at 16 bits.
So I set dma controller register's width at 16 bit and 4th static
memory bank register at 16 bit.

Here are my settings,

#define MSC2_VALUE        0x72f07ff8  // 4th and 5th static memory
bank register value


At first, register e_ch1 which is channel 0 at dma setting register
then

DRCMR0 = e_ch1 | DRCMR_MAPVLD;

Followings are my DMA register settings,

DSADR(e_ch1) = dma_src_phys1;    // SDRAM's physical address
DTADR(e_ch1) = 0x10000600;     // FIFO's physical address

DCMD(e_ch1) = DCMD_INCSRCADDR | DCMD_ENDIRQEN | DCMD_BURST16 |
DCMD_WIDTH2 | 0x200;
DCSR(e_ch1) |= DCSR_RUN;

I would really appreciate it if you can tell me what I was doing wrong
or what improvements can be done.
Or any example source that does Memory to Companion Chip(FIFO) using
DMA would be very welcomed.

Thank you.

Re: Using DMA to service externel peripherals(FIFO) in PXA255 Processor
Quoted text here. Click to load it

thank you for the reply
I've found that the problem was not in the dma register settings but
in the other settings
in fact, the static memory range was set at (nonburst or flash
memory)...
I changed it to the SRAM memory and all problems were solved.
#define MSC2_VALUE        0x72f07ff8  // 4th and 5th static
memory(before)

#define MSC2_VALUE        0x72f03FF9  // 4th and 5th static
memory(after)

Site Timeline