SPARTANII pinout table mysteries ???

I raised this with Xilinx some time ago and was told that it's intentional - something to do with getting all the packages in the same table. You should see that for the packages with more pins, they have two pins, one for each bank. IIRC you use the first of the banks, where they are duplicated for the same pin. For instance, for the XC2S15 in the VQ100 package, P26 is Vcco for bank 6, but for the TQ144, P106 is Vcco for bank 6 and P107 is Vcco for bank

1. They really ought to add an explanatory note, as it's rather confusing.

Leon

Mike,

They are not mistakes - they just mean that those pins supply power to both banks. On the larger packages there are enough pins to have more pins and give better flexibility.

They could do with describing it better but they do mention it in the document

2. kevin

It is just to have the same table for all the package.

Laurent

I have asked my friends in Spartan-land to add a sentence at the bottom of the pin-out table explaining this "pin-economy" trick. One redundant sentence can save a lot of irritation... Peter Alfke

Thanks Peter

Larry