[Q] Xilinx Webpack warning message "Cannot apply TIMESPEC TS_WR_CPLD"

Dear all,

I am using Syplify8.5 and Xilinx Webpack 9.1 to implement a CPLD XC95144XL, Verilog simulation showed everything fine, but P&R showed a warning message as follows

Cannot apply TIMESPEC TS_WR =PERIOD:WR_CPLD:50.000nS:HIGH:25.000nS

WR is simply an input clock used to latch another signal, such as

always @(posedge WR) begin Ext_Data_Latched