Wow, lots of activity since I last checked. To answer some questions:
This is for business, not an educational exercise.
The chip is in the TI 9900 family (weird architecture).
I will need to reproduce all logical levels into and out of the chip with t iming faithful to the original chip (or as close as I can get it, divide is going to be an issue). A lot of the circuits on the board are old 54-serie s discrete logic, so those all get sucked in too, so we wind up emulating t he tri-state internal to the FPGA. Outside, we have lots of level converter s and discrete control to faithfully replicate the 5V tri-state.
The application is real-time, so I think that rules out software emulation. I explored that path a bit, but after reading up on SNES emulators (1991 3 .58MHz 16-bit CPU) and finding that most are heavily optimized and largely written in assembly, I figured HDL was a better cost-value-risk proposal. W hen I got to the part how most software emulators only work most of the tim e and they actually need a 3GHz multi-core CPU to accurately model the SNES hardware delays in all cases, I was really convinced HDL was the way to go ...
Software emulators are apparently fine legally, and I think that's a close corollary to what we'll be doing. Given that Tekmos has a business at all, we should really be fine.
However, we're still going to consult with a lawyer just to be sure.