I'm trying to make a SDRAM controller with SOPC builder, but when I change the data width to 8bits I get the following error..
Warning: Signal "az_be_n" of type "byteenable_n" and width 1 must have width of 2, 4, 8, 16, 32, 64, 128.
I'm trying to make the system for a 64Mb SDR SDRAM, Micron MT48LC8M8A2P-75.
Even when I select the Alliance AS4LC2M8S0-10 chip it does the same thing. So I'm guessing it has to do with a width of 8 bits.
Thank you, Eric
If this is your own component that you're trying to make up in SOPC Builder, then I think the problem has to do with that the 'byteenable_n' SOPC input is supposed to be a vector. When you have an 8 bit datapath, there will only be one byte enable input which I'm guessing you have defined as a std_logic and not a std_logic_vector.
Wrong: az_be_n: std_logic -- Maps to SOPC's byteenable_n Correct: az_be_n: std_logic_vector(0 downto 0); -- Maps to SOPC's byteenable_n
I'm not totally sure, I haven't used SOPC Builder in a while but I seem to recall an issue like this.
KJ
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