Can Cyclone II PLL_out be driven by the pll output c0 and c1?

My _guess_ would be that driving 'PLL_OUTP' with C1 is essentially driving a regular IO pin from the global clock network. Hence you lose the ability to automatically compensate for the skew on the output wrt to the input.

Regards,

And table 7-5 on page 7-9 of the Cyclone II handbook would tend to support this...

Regards,

Mark Did you mean that if I assign the "PLL1_outp" to c1 it will functio as general I/O pin; otherwise,if I assign the PLL1_outp to c2 it wil function as PLL_out? I do not know if there is an option available i Quartus II to determine this pin to function as a general I/O pin o PLL_OUT. But does this problem influence the compensation for cloc skew? Another question: IN "Pin Information for the Cyclone® II EP2C15A, EP2C20..." it is sai that "These pins can only use the differential I/O standard if it is bein fed by a PLL output" for PLL[1..4]_OUTP. (on page 19) But in Cyclone II device handbook it is said that "One of these output (C2) can also drive a dedicated PLL_OUT pin (single ended o differential)." (Table 2-4 on page 2-26) So my question is if the PLL1_OUTP can be funtion as a single ende external clock out fed by internal pll ouput C2 or it must be used alon with PLL1_OUTN to function as a differential clock output fed by c2. Thanks, Leon

According to the Pin Information for the Cyclone II, the PLLn_OUTp/n pins can be used as general IO with PLLn_OUTp/n an optional functional.

And yes, IIUC if you drive it with C0/C1 then it is in effect a general IO and you cannot use the compensation as you would for C2.

Not really sure what your confusion here is??? You can drive single or differential output with C2. What may be confusing you is the statement from the pin info on p19 - it means you can't use PLLn_OUTp/n as differential *general-purpose* IO - only a differential clock output driven by the PLL.

Regards,

Thank you Mark