Latest threads in Field-Programmable Gate Arraysshow only best voted threads
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The TimingAnalyzer (Timing Diagrams and Analysis)
Hi All, I created the TimingAnalyzer a long time ago. In the years that have past, the interest in this kind of tool has decreased. I think for the following few reasons. Engineers use tools from the...
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7 years ago
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Go to church this Sunday
Contact your Christian family member, co-worker, classmate, neighbor, and go to church this Sunday. Ask that person the questions you have, and it's okay to not be sure who God is, if He's real, etc....
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7 years ago
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verilog code
hi, i want verilog code for RS232
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7 years ago
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Go to church today
Go to church today. Get yourself back on the right track again. Say a little prayer asking God to help you. He will. Best regards, Rick C. Hodgin
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7 years ago
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entity component binding issue with configurations
I have binding warnings with How do I solve them ? even I modify the configuration as in , I have this error
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7 years ago
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How much is your life worth?
How much is your life worth? There are a lot of hypocrites in this world ... Christians who call themselves by that name, yet are no different than the world. Using profanity, dressing...
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7 years ago
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Microsoft's FPGA Translates Wikipedia in less than a Tenth of a Second
I found this pretty impressive. I wonder if this is why Intel bought Altera or if they are not working together on this? Ulpp! Seak and yea shall find.... "Microsoft is using so many FPGA the company...
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7 years ago
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CORDIC in a land of built-in multipliers
Now that FPGAs have built-in DSP blocks, how commonly is CORDIC used? Is it still a necessary go-to for anyone contemplating doing DSP in an FPGA, or is it starting to ease onto the off-ramp of...
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7 years ago
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Eternal life
Did you know you are an eternal being? And that you will go on after you leave this world? What's on the other side? What will it be like? We see this world today and we shudder to think about an...
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7 years ago
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19 minutes to Life
A 30-something female describes the deception of the enemy in thinking Heaven is attainable by works or morals. It isn't. You must be born again. "I'll be honest, I thought I was good enough for...
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7 years ago
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Help with multiplier code
Hi, I am having problem with , and It just could not multiply 2 and 3. and 3 is never read in. Why ? Besides, there is timing violation, if I am not wrong, should be due to inefficient multiplier...
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7 years ago
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Vivado HLS (C/C++/SystemC to ASIC/FPGA)
Does anybody have experience with Vivado HLS? This tool is very similar to the internal processes I have planned for my Logician tool. Best regards, Rick C. Hodgin
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7 years ago
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xilinx aurora lane order
Guys I have two FPGAs with 4 MGTs connected between them using Aurora. The firmware guy has insisted (and I've taken a quick look myself) that we cannot define the link order. This means that I have...
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7 years ago
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How do I preserve Hazard safety terms?
for muxen. during combinatorial optimization. in berkeley-abc. I am using the binary aig format for importing. It knows only about `and' and `inverter' gates. During optimization the safety terms get...
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7 years ago
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Re: PALCE22v10 / GAL22v10 programming algorithms ... Found?
Youth, thats the bit I missed out on, I was a mature student then I did the EPLD work. I did have the (NDA) programming documents from LatticeSemi and Intel for these parts, and seem to remember that...
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7 years ago
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