Latest threads in Field-Programmable Gate Arraysshow only best voted threads
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True Random Number Gen in Virtex 7
Has anybody tried to build a true random number generator from Catalin Baetoniu's paper? He uses interconnected ring oscillators in conjunction with a "Linear Hybrid Cellular Automata" for making the...
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7 years ago
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Lattice Semiconductor $99 promo on several items
If you're not on their mailing list, Lattice Semiconductor has some items on sale through January 27, 2017 or as supplies last: ECP5 Versa Development Kit ($199) now $89: ECP5-5G Versa Development Kit...
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7 years ago
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Go to church today
Ask questions about Jesus. Seek answers. Demand to know the truth, but be ready to receive it. This world teaches us certain things. Nearly all of them are literal opposites of Biblical teachings, and...
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7 years ago
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Custom timing on Altera Cyclone V GX dev board
I have a "Cyclone V GX Starter Board," with an Altera Cyclone V GX 5CGXFC5CF27C7N. I've designed a logic layout for a video card that only does SVGA output in graphics modes, and particularly only...
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7 years ago
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Linux OS for FPGA worth
I keep debating if I should start switching my PCs from Windows 10 to Linux, several of my main PCs are on Win 10 Preview, and Microsoft made it so you can't get off until the next non-preview...
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7 years ago
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SD card emulation
Emulating an SD card in FPGA - with ?data? stored over USB on host PC. I?m testing single board computers and wearing out SD card by const antly flashing them with different builds, not to mention it...
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7 years ago
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Happy Thanksgiving
Psalm 100 Shout for Joy to the Lord, All You Lands! 1 {A Psalm of praise.} Make a joyful noise unto the LORD, all ye lands. 2 Serve the LORD with gladness: come before his presence with singing. 3...
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7 years ago
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Programming Problem
I use a Lattice LFXP3C-3TN100C on a production board that has been made for several years with quantities in the thousands. The HW-USBN-2A JTAG programmer typically works without complaint, both of...
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7 years ago
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Phrasing!
Here's an interesting synthesis result. I synthesized this with Vivado for Virtex-7: reg [68:0] x; reg x_neq_0; always@(posedge clk) x_neq_0
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7 years ago
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Tools on Linux
Does any of the current FPGA manufacturers have free tools that work under Linux? I know that Xilinx ISE used to, but that was about a decade ago.
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7 years ago
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Free webinar on UVVM (Universal VHDL Verification Methodology, Free and Open source), Thursday Nov. 17.
How can we do FPGA VHDL Verification faster and with better quality ? ? at no extra cost? This is actually possible ? and with an average efficiency improvem ent of 20 to 50% for medium to high...
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7 years ago
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MicroSemi Libero Software Installation Problems
I have version 11.6 running on my laptop with Windows 8. For a workshop tomorrow I need to update to version 11.7 service pack 2. I downloaded the software and started to install it, but I can't get...
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7 years ago
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Mentor bought by Siemens
For those that haven't seen it: Never thought Siemens would be interested in an EDA company. Hans Siemens AG agreed to buy Mentor Graphics Corp. for $4.5 billion in its biggest acquisition since 2014...
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7 years ago
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Latch/flip flip without the use of process
Hi, I should have probably sent this question to the VHDL newsgrp but since it has low activity, I've decided to send it here. It is well documented that processes should be used to code sequential...
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7 years ago
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cool science thing
Not all science research is true (roughly half) but this one is great. Trees dump gaseous organics into the air (presumably at some expense) and those things go high, become nanoparticles, get swept...
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7 years ago
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