Latest threads in Field-Programmable Gate Arraysshow only best voted threads
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MicroBlaze simulator, software ownership rights for SALE
Hi I am making a time limited offer for full ownership rights sale for "XSIM Xilinx Platform Simulator" The simulator was developed in 2006, it was the first MicroBlaze software simulator able to run...
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16 years ago
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Interface on board ADC to Spartan 3E startkit
Hi, I want to interface on board ADC to spartan 3E startkit. Actually I am developing digital filter in FPGA for that I need ADC and DAC interface with Spartan 3E. I have done with DAC but now I want...
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16 years ago
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Antti needs a job
Our friend Antti is out of a job. Is there somebody in the Munich area who can offer a job, or some consulting ? I need not explain that Antti is a really sharp engineer with lots of FPGA experience....
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16 years ago
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Embedded in Nurnberg
Hi c.a.f. folks for anyone wishing to say hello at Embedded, I am planning to be there on 28th afternoon, say will be around Xilinx booth at 16:00 Antti Lukats P.S. I hope I will have my handheld...
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16 years ago
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Video Over RF - using bluetooth and Xilinx Video Starter Kit
Hi, My Project title is "Serial RF Core for Multimedia Stream Transfer" I am using Xilinx Video Starter Kit, and I supposed to transfer a video stream over RF, using Bluetooth, I am totally confused ,...
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16 years ago
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Over utilization of FPGA resources
Hi, I'm currently facing a problem downloading my design to FPGA as my design has overutilized the FPGA resources (slice and DSP48). I'm using FIR compiler_v1 for both my lowpass and notch filter, I...
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16 years ago
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MULTICONF-08 Draft paper submission deadline is just few days from now
MULTICONF-08 Draft paper submission deadline is just few days from now The MULTICONF-08 (website: ) will be held during July 7-10 2008 in Orlando, FL, USA. We invite draft paper submissions and the...
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16 years ago
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Synthesis-Place-Route benchmark for i386-32bit
This is a benchmark test cd, to get performance data for a specific computer setup. Please contribute by posting a followup with the results from the 'real' column. It's a complete 227 MB zipped .iso...
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16 years ago
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Linux and the Digilent Basys ?
I work for a Linux software house and would like to offer a "Hello, World!" tutorial for FPGAs. The idea is to keep it simple and low cost. The Digilent Basys board looks good for cost but not for...
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16 years ago
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Ballpark PLB frequency
Hi, I'm designing a platform on a Xilinx Virtex 4 FX60 chip and I am somewhat conerned at the capabilities of the PLB bus in the system. I require very high throughput and I'm conerned that the PLB...
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16 years ago
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PC configuration for fastest compiles (synthesis, place and route, etc)
I am looking at getting a new PC for doing FPGA development. I mostly use the altera tools and aldec active HDL. I was wondering if anyone had any thoughts or comments on optimal PC configurations for...
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16 years ago
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distorted sine wave
I have written a process to generate sine wave. I am getting a distorted wave and not a pure sine wave. I am not sure if this has anything to do with the simulator. two : process variable...
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16 years ago
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Virtex 4 package layout
Hi I am laying out a board for a Virtex 4 FX20 in a FF672 package. Now woul it be ok if I connected some of the NC pins for this device such as groun and VCCO so that I could use an FX40 or FX60 if I...
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16 years ago
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Spartan 3 configuration download error
Hi, I am using the Xilinx ISEWebPack 8.1i together with a Spartan 3 Starter Kit (Digilent, bought from Xilinx). Now, from time to time I get an error message about failed program download to the FPGA...
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16 years ago
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Reprogramming Proms,before the fpga boots from them (Avnet board,Xilinx Proms)
Hello, I have programmed the 2 cascaded xilinx-PROMs of my development board with incorrect files (.mcs files). What I have actually done is program prom1 with the .mcs file that should go to prom2...
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16 years ago
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