SCOPES call for Participation

CALL FOR PARTICIPATION

SCOPES 2005

9th Annual International Workshop on Software and Compiler for Embedded Systems

September 29 - October 1, 2005 (tutorials on September 29)

Dallas, Texas

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CONFERENCE INFORMATION

Software and Compilers for Embedded Systems (SCOPES) 2005 is the 9th workshop in a series of workshops which initially were called "International Workshops on Code Generation for Embedded Processors". The name SCOPES has been used since the fourth workshop. The scope of the workshop remains software for embedded systems with emphasis on code generation (compilers) for embedded processors. 2005 is the first year that the SCOPES workshop will be in the United States. Like the previous workshops, SCOPES 2005 will promote an interactive atmosphere in which questions are encouraged during all presentations. The program will also include special discussion sessions. The workshop is open to all interested participants active in the field. More information, including We hope to see you there.

Full Workshop information is available on the workshop web site (above).

ADVANCE PROGRAM

Thursday, September 29

1:00-5:00pm: Tutorial Code Optimizations For Efficient Embedded Systems Peter Marwedel (Univ. of Dortmund + ICD Dortmund, Germany) 6:00-8:00pm: Reception at Fairmont Hotel (Dallas Museum of Art, a short walk from the hotel, sponsors a Jazz concert and tour of the Museum, starting at 7:00pm. No admission fee.)

Friday, September 30

9:00 Real-Time Language Support for Interoperable Messaging in Sensor Networks. Kevin Chang (UCLA), David Gay (Intel Research Berkeley)

Performance Guarantees by Simulation of Process Networks Marco Bekooij (Philips Research Eindhoven) Jef van Meerbergen (Philips Research Eindhoven), Sonali Parma (Eindhoven U. Technology)

A Real-Time Garbage Collection Framework for Embedded Systems. Wei Fu, Carl Hauser (Washington State U.) 10:45 Panel Discussion Software Engineering for Embedded Software: How useful are the newer paradigms? Moderator: Kendra Cooper (University of Texas, Dallas)

2:00 Optimization I A Software-only Compression System for Trading-off Performance and Code Size. Karine Heydemann, Franois Bodin (IRISA/INRIA Rennes, France), Charles Henri-Pierre (PRISM, Versailles, France)

Software Synthesis from the Dataflow Interchange Format. Chia-Jui Hsu, Shuvra S. Bhattacharyya (U. Maryland, College Park)

Generic Software Pipelining at the Assembly Level. Daniel Kaestner (AbsInt GmbH), Markus Pister (Saarland U. & AbsInt GmbH)

3:45 Memory Systems The Bit-reversal SDRAM Address Mapping. Jun Shao, Brian T. Davis (Michigan Tech.)

Global Memory Optimisation for Embedded Systems Allowed by Code Duplication. Martin Palkovic (IMEC Lab. Leuven, Belgium), Henk Corporaal (TU Eindhoven, The Netherlands), Francky Catthoor (IMEC Lab, Leuven, Belgium)

Combining Compiler and Operating System Support for Energy Efficient I/O on Embedded Platforms. Ripal Nathuji, Balasubramanian Seshasayee, Karsten Schwan (GA Inst. Tech.)

Saturday, October 1

9:00 Keynote Speaker Wayne Wolf

10:30 Optimization II

DSP Address Optimization Using Evolutionary Algorithms. Sean Leventhal, Lin Yuan (U. Maryland, College Park), Neal K. Bambha (US Army Research Laboratory), Shuvra S. Bhattacharyya, Gang Qu (U. Maryland, College Park)

MTP: A Petri Net-Based Framework for the Analysis and Transformation of SystemC Designs. Nick Savoiu (U. CA-Irvine)

Power Optimization for the MLCA Using Dynamic Voltage Scaling Ivan Matosevic, Tarek Abdelrahman (U. of Toronto), Faraydon Karim, Alain Mellan (STMicroelectronics)

11:45 Lunch 1:30 Birds of a Feather Sessions
--
		       Dr. Steve Beaty (B80), Chair
	     Department of Mathematical and Computer Sciences
		   Metropolitan State College of Denver
                 VOX: (303) 556-3208 | FAX: (303) 556-5381 
		beatys@mscd.edu | http://cs.mscd.edu/beaty
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