Memory Test algorithm

Hi all, I'm trying to use the Michael Barr's memory testing algorithm

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but I'm not completely satisfied of it. Referring to the Address Bus test, I think that not all the address bus fault can be detected by this algorithm... For example, If you have more than one address line stuck high, you'll not catch it. If you have two lines stuck together and the line that goes to 1 drives high the other line, you'll not see it. Am I wrong?

In order to catch all the address bus fault I modified Barr's algorithm in this way:

datum *memTestAddressBus_Complete(volatile datum * baseAddress, unsigned long nBytes) { unsigned long addressMask = (nBytes/sizeof(datum) - 1); unsigned long offset; unsigned long testOffset;

datum pattern = (datum) 0xAAAAAAAA; datum antipattern = (datum) 0x55555555;

for (testOffset = 1; (testOffset & addressMask) != 0; testOffset

Reply to
MrPink
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The simpleset Address BUS test is to use the incrememnting count written to binary boundaries e.g

Add Data 1 2 2 3 4 4 8 5 16 6 ....

Only use a boundary value you shift by one place within known memory ranges.

The important bit is to

Write all values Read a 'random' address in memory (not on binary boundary) read the values in REVERSE order

Becomes very simple loops even with offsets for RAM start points.

Because the write and read are separate and done in different orders you avoid capacitive problems and catch all combinations or address line short open-circuit etc..

You must have tested a single location with a full data pattern first to check the data bus appears correct.

Seems an excessive test to me, as you seem to be writing to every location in offset blocks, not the single address line boundaries.

If an address line is wrong how is writing to every location going to help? Especially if you stop at first error and don't do block analysis.

Test each address line on its own first, then do more complex tests test every location if you wish but NOT with the same pattern - alternating, sliding '1' or '0', pseudo-random.

Any test writing and reading every single location WILL take time. No way round it.

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Paul Carpenter          | paul@pcserviceselectronics.co.uk
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Reply to
Paul Carpenter

Hi Matteo,

Try googling for "march B" or "march C" memory tests. These are the best I could find.

Regards, Wim

Reply to
WiMos

And while googling anyway, add "march cw" to the list.

Regards Marcus

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Reply to
Marcus Harnisch

I saw this "March" based algorithm (and the not so simple theory behind them) , but I thought they are used for memory tests over the single bit cell. (i.e. used es EOL test by ram chip manufacturer). Do you think they are good also to perform simple tests on the chip in order to check if it's correctly mounted on the board?

Matteo

Reply to
MrPink

If your memory size is small enough or you have enough time (testing memory during burn in, for example), a walking one bit test followed by a walking zero bit test is quite good. It is very simple to code, and it catches a huge variety of rare problems, but the test takes a long time to run on larger memories.

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Guy Macon
Reply to
Guy Macon

Hi March C will catch all stuck at and solid addressing problems. Things it is weak at are retention/history, read disturb, some weak write/read problems and some pattern sensitive faults. It is still a good general purpose test. Dwight

Reply to
dkelvey

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