You're probably close to the realizable limit.
-- Marco UCO Lick Observatory Laboratory for Adaptive Optics
- FPGA interface using the Synchronous FIFO mode. OR this 480 Mbps always remains the Theoretical Max and we get somewhere around 240 Mbps ?
Thanks, Manish
I had the same problem. FTDI just recently released an app-note called: "AN_130 FT2232H Used In An FT245 Style Synchronous FIFO Mode". In this app. note they say to enable RTS_CTS flow control in the driver. This fixed the problem for me. I would not of thought this would be applicable to the high speed sync-fifo mode, but it fixed it for me. I am currently transferring 1 GB of data in about 1 minute without errors on a machine that is probably 3 to 4 years old.
Good luck!
This chip is pretty nifty assuming the wrinkles can be ironed out.
- amess
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