CRC calculation question

Hi all, I am trying to understand the CRC division arithmetic. While I am able to grasp the modulo2 division and the shifting and exoring etc. I still dont understand why we append the message stream with W zeros(W being width of generator poly) before we commence the division.

Lets say we dont append the message stream with zeros, even in that case we can still find a remainder? Isnt it ?

regs ashu

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ashu
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IIRC, it's so that each data bit affects all bits in the resulting CRC. If you don't do append any padding bits, the last bit of the input only affects the least significant bit of the CRC.

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Nobody

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