how does bypass capacitor work?

out

The noise spikes are high frequency. Does it help you to think of the cap as a small local power supply?

I just found this with Google:

Excellent piece of info!

S.

Basically, the cap at the Vcc of the chip diverts any noise spikes to ground. Think of it as water flowing downhill instead of up. The cap provides a low impedance path for any noise spikes to ground, so they go to ground rather than into the chip.

out

Wires have inductance. Circuit board traces have inductance. It takes time for current to make its way from a power supply to a chip that has a sudden drop in resistance across its supply lines (and modern chips can do this extremely quickly, compared to the time it takes light to make its way to the supply and back). Inductance takes time for current to change by the differential equation: V=L*(di/dt). A capacitor is defined by the differential equation: I=C*(dv/dt). This means that the current through a capacitor is proportional to the time rate of change of the voltage across it. (Whew!)

So taking all that into account at the same time (imagination is faster than the speed of light) when a chip passes a sudden pulse of current, instead of that pulse having to make its way through the circuit board trace inductance and supply wiring inductance (including the time it takes for the current to change through those inductance and not even worrying about the speed of light over that distance) and having to put up with all the voltage sag it takes to drive that current pulse through all that inductance, if you put a capacitor very close to the chip, and if the capacitor is big enough, a small sag in the capacitor voltage allows it to supply a very quick pulse of current to the chip.

Then the inductive supply distribution system charges the cap back up before the next pulse.

Isn't that easy?

;-)

You may apply the Xc formula. What's the frequency of a DC and AC voltage ?

When the chip makes a sudden demand for energy it pulls the +ve supply downwards and the -ve supply upwards (as sort of momentary short circuit).

Why? Because although the supply tracks are "just wires" they still have a little inductance and if you try to push a fast enough *change* in current though them, they will "react" to that change and "delay" it leaving a temporary "vacuum" at the demand end, i.e. a drop in voltage at the +ve (and a rise at the -ve end).

The "bypass" cap, as the above poster explains, is a temporary battery that makes good the temporary deficit more or less provided you keep its legs as short as possible and connect *both* ends as close as possible to the supply pins of the IC.

But evidently all things suffer from this effect, that is why you might see as many as three bypass capacitors, all connected in parallel e.g. 100uF, 10nf, 100pf because each have limitations frequency-wise: the smaller caps "clean" up the faster transients.

Cheers Robin

That is difficult to nail down without modeling the surroundings, but here is an article about the inductance of loops (and the supply connections to a bypass capacitor form a loop):

If you pick the wrong

Yes. Somewhat lossy capacitors are not necessarily bad for bypassing for this reason. I have connected an ohm in series with a .1 uf on a board near the connection points for the supply wiring to damp such ringing, in addition to the distributed bypass capacitors.

Bus drivers are especially bad actors, because they have high current capability per bit line, and are switched on and off in large groups. Big knocks.

Not for me, maybe for others. I try to select the adjacent bypass values based on peak current drawn and duration of pulse, to limit the sag during the pulses, neglecting the current supplied by the rest of the system. If no part of the system can generate a significant instantaneous voltage swing across the supply rails, there is little likelihood that any large resonance will occur. But I always check and have provision for ringing dampers as I described above, as cheap insurance.

How much inductance does a trace generally have? If you pick the wrong capacitor, can it resonate with this inductance, given a particular frequency for a chip's pulses of current?

I recall a T1 card that was designed at a former company (not by me, I'm a software guy) that had issues with the 32 bit address/data bus having too much inductance. There were data corruption issues, and when they clipped on logic analyzer probes, the corruption went away. They fixed it by hacking on tiny smt capacitors. Is that kind of thing easy to predict? (It was between a QED MIPS core and a Galileo memory/pci controller.)

This shows why big capacitors become pretty silly at high frequencies, and you better get that capacitance a lot closer than 10 cm to the die. With surface mount caps, it even makes a difference whether you punch to the power plane under the cap or beside it or at the end of it. And two vias on opposite sides of the cap are better than one.

This guy claims that you can get between 0.5uH/m and 1uH/m of inductance. That's amazing. It implies that with a 10cm run, and a bypass cap of 0.1uF, you can get resonance at 2.25MHz. There are clearly write or read sequences that can generate lots of harmonics near there given a 66MHz data rate.