help pls!! memory address decoder design

the question is Design a decoder for the following using a "138 decoder, NAND gates, and iinverters": a 1K memory is connected to a 16 bit address but. the first location of the memory is to be at 4000H. DO NOT use partial decoding. draw a decoder circuit that gives an active low for these memory locations.

this is a review quiz i got today in my first microcontroller lecture. my prof just gave us a super simple solution that totally confused me...

1K = 1024 A0 ~ A9 change A10 ~ A15 decoded

i understand that 1024 = 2^10 so A0 ~ A9 is used for address. but what does he meant by "A10 ~ A15 decoded"???

thnx for any help...

{ Kelvin@!!! }
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You want 0100 00xx xxxx xxxx

The 138 has 3 enables: G1, G2A, G2B.

G1 is active high. G2A/B are active low.

You could feed the top 3 address lines to the enables and the next 3 address lines to the ABC inputs:

G2A = A15 G1 = A14 G2B = A13 C = A12 B = A11 A = A10

This way, output Y0 would be your RAM chip select:

Y0 = 0100 00xx xxxx xxxx Y1 = 0100 01xx xxxx xxxx Y2 = 0100 10xx xxxx xxxx Y3 = 0100 11xx xxxx xxxx Y4 = 0101 00xx xxxx xxxx Y5 = 0101 01xx xxxx xxxx Y6 = 0101 10xx xxxx xxxx Y7 = 0101 11xx xxxx xxxx

You don't need any extra gates.

Reply to
Andrew Holme

You need 10 bits to address each individual byte in the 1k memory. Since it is likely that the intended use is to have each byte of the 1k memory to occupy successive bytes in the memory space, the low order 10 bits of the address are implied. That's the A0 through A9 that you agree with.

What this also means, though, is that you need to break up the 16 bit address space (65536 bytes) into 64 distinct 1k sections (that's the assertion from the instructor about the "do not use partial decoding." He/she wants it fully decoded to the exact 1k section and doesn't want the memory mapped anywhere else. This means you need all 6 of the other address bits to decode out the 64 different 1k regions. And you only want exactly ONE of them to be hooked up so that a low is presented to the 1k RAM at the right 0x4000 start address.

That is, you need to decode this: 0100 00xx xxxx xxxx

A '138 decoder will only decode a 1-of-8 circumstance and that, by itself and without using the enables, wouldn't get you there. Hence the NAND and INVERTER options allowed for you to use -- most likely something going to those enable inputs on the '138. (I see a single inverter required, in addition to the '138.)

Have you read and understood the '138 data sheet? Do you need to have anyone explain the solution the instructor provided in more detail?


Reply to
Jonathan Kirwan

thnx for your reply

now i understand the 4000H part. from 0100 0000 0000 0000 to 0100 0011 1111 1111 is the memory im lookin into... if the question changes to ,say , a 2K memory connected to the same but starting at 5000H. i'll be looking at the memory 0101 0xxx xxxx xxxx, which starts from 0101

0000 0000 0000 and ends at 0101 0111 1111 1111. am i right?

for the decoder part. is he looking for a active low output when the address of interest is fed into the input of the decoder?? isn't that a encoder?

for '138, if i feed it with a 011, i should get a output of 0000 1000 which means im selecting the 011th ouput of the decoder. that's why 138 can also be used as a DMUX which means make only the Nth, N is the input, output active.

so let me go back to the question. if it's asking for a decoder, im taking a number in binary,N, which represents the Nth byte in the starting from

4000H. I'm gonna decode it then produce some result. if i want to access the 1023th byte my memory, according to the function of a decoder, i am getting a 1024-bit output which the MSB high and all other low.

something is just not right here... please point it out...

thank you very much

{ Kelvin@!!! }
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"Kelvin@!!!" schreef in bericht news:Zx%Ld.250043$8l.167533@pd7tw1no...

Well, a 1k memory requires 10 address lines to access each address. So the adress lines A0~A9 need to be connected to the memory chip. The first address you need to decode is

0100 0000 0000 0000

and the last one

0100 0011 1111 1111

or generaly

0100 00xx xxxx xxxx

So you need to provide a chip select for the memory:

CS = /A15 + A14 + /A13 + /A12 + /A11 + /A10

This function does not fit in a 138 so you have to add some other logic.

Google for the LS138 or HCT138 to find out the possibilities of this chip.

Be warned that, although it is not mentioned in the exercise, in practice CS lines are often activ low.

petrus bitbyter

Reply to
petrus bitbyter


CS is to be active low. The 6 upper address lines are not OR'd together.

Reply to
Lord Garth

"Lord Garth" schreef in bericht news:ev6Md.22634$

You are right if you consider the plus sign an OR which is usually done. I also use to write the * for AND and the + for an OR but the other day I had to work with a text that used the + for an AND and a | for the OR. Very uncommon but that's why I was mistaken. So you have to read :

CS = /A15 * A14 * /A13 * /A12 * /A11 * /A10

petrus bitbyter

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petrus bitbyter



I think we lost the OP....

I thought you might confuse the OP which is why I pointed it out. I think some text use the asterisk for negation rather than the / most of us use just to mix up our heads some more!

Reply to
Lord Garth

thank you guys very much....

altho the notations are a bit confusing, i'm good with it... i guess sooner or later im gonna mess up with the notations...

still remember the words my C intructor told me when he reject my code... "No matter how good your code is, as long as it doens't follow my rules, it's not completed. Here im the boss, you work for me. Just like in the industry!!" i was just using a differnet indent style...

{ Kelvin@!!! }
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