Hello everyone
I hope this isn't the wrong place to ask, but I'm having a bit of a problem= . I am trying to build an abc to positive/negative/zero components transfor= mation block (in LTspice), I did it, but sometimes I get erroneous behaviou= r: DC levels seem to be "omitted" at the output for an 'abc > 120 > abc' ch= ain.
The schematic I'm using is this: i45.tinypic.com/2hwhaqh.png (hopefully the= link won't get deleted)
and the waveforms are these: i50.tinypic.com/21o4fpk.png
You can see that all are identical, but b/b* and c/c* have a DC difference = between them. Here are the differences: i50.tinypic.com/juy1pv.png (in1, in2 and in3 are the a, b and c in the previous screenshots)
The signals from the generator are these:
- all three phases have unity fundamental + 3rd/3, 5th/5 and 7th/7 all posi= tive harmonics;
- phase a has twice the amplitude;
- phase b has 0.1Vdc;
- phase c has 0.3rad phase lead.
If only b or c phase have offset, the output seems to swap it, for example = (this case): b phase has 0.1Vdc, but b* has zero, while c* has 0.1Vdc. The = same happens for c with DC and b normal. But if both b and c have the same = offset, all the three phase's wafeforms match! For a phase, everything work= s.
Is this normal? Are DC bias levels "left behind"?=20
Thank you in advance, Vlad
PS: In order to build the schematic for a practical use, I had to maneuver = a bit through the equations to avoid the [+/-]2*pi/3 delay, and so I transf= ormed exp([+/-]j*2*pi/3)=3D-1/2[+/-]j*sqrt(3)/2, which left only j to take = care of, a minor leap for SPICE-kind. That's why the delays used are "0.25/= f", not "0.666/f".