Further bandgap troubles

I've been experimenting some more with bandgap references, this time I'm attempting to design a Brokaw cell. I have the circuit below set up in LTSpice. I believe I've done the math correctly as the output seems to be in the right range for the bandgap of silicon, but the problem is I'm not getting the nice camel's hump tracking with temperature one would want! These Brokaw cells seem a lot more difficult to set up properly in simulation than some of the other bandgap designs. Any help would be appreciated, the LTSpice circuit follows:

Version 4 SHEET 1 1484 680 WIRE 144 -416 80 -416 WIRE 208 -416 144 -416 WIRE 384 -416 208 -416 WIRE 80 -368 80 -416 WIRE 208 -368 208 -416 WIRE 144 -320 -80 -320 WIRE 144 -224 144 -320 WIRE 208 -224 208 -272 WIRE 208 -224 144 -224 WIRE 384 -128 384 -416 WIRE 80 -80 80 -272 WIRE 320 -80 80 -80 WIRE 352 16 16 16 WIRE 80 64 80 -80 WIRE 208 64 208 -224 WIRE 16 112 16 16 WIRE 352 112 352 16 WIRE 352 112 272 112 WIRE 384 112 384 -32 WIRE 384 112 352 112 WIRE -224 160 -224 96 WIRE -224 160 -272 160 WIRE -208 160 -224 160 WIRE -144 160 -208 160 WIRE -80 160 -80 -320 WIRE 208 160 192 160 WIRE -272 208 -272 160 WIRE -144 208 -144 160 WIRE -32 256 -80 256 WIRE 80 256 80 160 WIRE 80 256 48 256 WIRE 96 256 80 256 WIRE 192 256 192 160 WIRE 192 256 176 256 WIRE 80 304 80 256 WIRE 80 416 80 384 FLAG 80 416 0 FLAG 288 -480 0 FLAG 288 -560 Vcc FLAG 144 -416 Vcc FLAG 384 192 0 FLAG -208 256 0 FLAG -224 16 Vcc SYMBOL res 64 288 R0 WINDOW 3 36 68 Left 0 SYMATTR Value 7850 SYMATTR InstName R1 SYMBOL res 192 240 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 28 56 VBottom 0 SYMATTR InstName R2 SYMATTR Value 470 SYMBOL voltage 288 -576 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 12 SYMBOL pnp 144 -272 R180 SYMATTR InstName Q3 SYMBOL pnp 144 -272 M180 SYMATTR InstName Q4 SYMBOL res 368 96 R0 SYMATTR InstName R3 SYMATTR Value 10k SYMBOL res 64 240 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R4 SYMATTR Value 47k SYMBOL res -240 0 R0 SYMATTR InstName R5 SYMATTR Value 1MEG SYMBOL npn 16 64 R0 SYMATTR InstName Q1 SYMBOL npn 272 64 M0 SYMATTR InstName Q2 SYMATTR Value NPN 2 SYMBOL npn -272 160 R0 SYMATTR InstName Q6 SYMBOL npn -144 160 R0 SYMATTR InstName Q7 SYMBOL npn 320 -128 R0 SYMATTR InstName Q5 TEXT 496 -48 Left 0 !.dc temp -45 150

Reply to
Bitrex
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Why in the h.e. double toothpicks would anyone WANT a parabolic-like tempco IF one could have it linear, or better yet, flat (zero or close to that)??

Reply to
Robert Baer

[snip]

Leave R2 at 470, "twiddle" R1 wee-bit-by-wee-bit until you get the "hump" ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Reply to
Jim Thompson

Thanks Jim, I managed to get the "hump", but I was surprised by the amount I had to tweak R1 to get it. Had to bring it down to 6500 ohms, which doesn't fit the ideal equations very nicely...:(

Reply to
Bitrex

The problem is that the standard equations are simplifications: dVBE/dT is not exactly -2mV/°C, there's a grading coefficient dependent on the emitter diffusion profile. And BETA is not infinite ;-)

Replacing the upper mirrors with long-channel or (preferably) cascoded PMOS mirrors will help a lot.

"2" Isn't a big ratio, I like "8", so that a 3 x 3 array has 8 devices around the single device.

Double check that your "start" device isn't contributing some error current.

Early Effect screws things up also. Vary your supply voltage and get some more heartburn :-(

I wish there were a way to convert a PSpice Schematic to LTspice... I have TONS of examples that I could show if it were an easy task.

Have fun! ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Reply to
Jim Thompson

I picked "2" for a ratio because I'm working on a circuit where I need a stable voltage reference, and was hoping to use an el cheapo LM3046 transistor array to implement a Brokaw cell. It has 3 matched transistors plus a differential pair - so those 3 for the core of the cell and maybe use the differential pair as part of the error amplifier.

I had a weird idea for a voltage reference based on hyperbolic identities. If the output current of a differential pair is proportional to the hyperbolic tangent of Vin, then its derivative with respect to Vin is something like Io/2VT(1 - tanh^2(Vin/2VT)). Take the output current of another differential pair, square it, and then add the two and convert to a voltage...if you set up the tail currents of the two differential pairs correctly so the coefficients of tanh^2 end up the same should get 1 times something as an output, right? Which doesn't depend on temperature or anything else.

Anyhow as you might expect I couldn't get it to work. :) I was a bit confused on how to take a derivative with respect to Vin, rather than time, in the "analog domain." Also it requires a squaring circuit and a summer whose outputs would change with respect to temperature and other factors.

Reply to
Bitrex

I can recall a version like that. I'll look around. ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Reply to
Jim Thompson

Well, the parabola is only visible if you zoom in on the Y axis quite a bit - if the circuit is set up properly the height of the parabola is only about 4 millivolts on a temperature range of -50 to 150 degrees. If you zoom out a bit, that looks pretty flat!

Reply to
Bitrex

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

PSpice schematics aren't ASCII, are they?

Will Capture seamlessly open them?

---Joel

Reply to
Joel Koltner

PSpice Schematics _are_ in ASCII

Capture is not in ASCII.

I can import a PSpice Schematic into Capture.

Is there a Capture to LTspice conversion path? ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Reply to
Jim Thompson

If you have the headroom, you can get an LM329 for under half a buck in small quantities. Its's a buried zener, and to this day is far better than any other low cost reference.

Cheers

Phil Hobbs

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Reply to
Phil Hobbs

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

Ah, great.

No, but Capture will -- via scripting -- let you poke around through the entire design database programmatically, so at least that's one step closer to building a converter. But this is probably largely moot since PSpice starst out in ASCII anyway...

---Joel

Reply to
Joel Koltner

So it's probably only an issue of symbol matching?

Since PSpice Schematics can be found for free on the web. Maybe I can post PSpice Schematics in ASCII ?:-) ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Reply to
Jim Thompson

to

Is PSpice schematics like Orcad Capture with a full library editor or more restricted to simulator symbols?

Does it crash less than Capture?

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Regards, Joerg

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Reply to
Joerg

AFAIK it was never ported to SMT. That could mean it's on the way to lalaland unless there is some compelling reason not to, such as defense use.

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Joerg

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Only Crapture crashes ;-) ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Reply to
Jim Thompson

to

starts

Hmm, weird, so it must be rather different software. What is the main difference between PSpice Schematics and Capture, from a features point of view?

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Regards, Joerg

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Reply to
Joerg

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

The way I've view it would be to say that getting a netlist into LTspice (with the WIRE directives and all) does look to be pretty straightforward but that, yes, gets symbols to match is the trickier part.

Do PSpice schematics contain (effectively) the netlist and then commands indicating how to draw the connectivity between parts (like LTspice)? And do the PSpice schematics contain copies of all the symbols used, or do they just reference a library file for symbols?

I'll take a closer look at this this weekend; I'm sure there would be a lot of people interested in either a PSpice or (just as good) Capture converter to LTspice, even if initially it's pretty dumb and just does, e.g., a single sheet flat (no hierarchical parts) schematic or somesuch.

(Granted, I seem to recall that you use plenty of hierarchy in your designs, but heck, you have to start somewhere.)

---Joel

Reply to
Joel Koltner

I think one of the problems is that LTSpice does not contain symbol information in the schematic file, meaning it also won't attempt to read any such information from there. So you'd end up with a schematic with a lot of holes, and a barrage of error messages when starting a sim.

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Regards, Joerg

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Reply to
Joerg

in

closer to

starts

Hi Jeorg, Schematics is strictly designed for simulation. No PCB netlist outputs (in modern versions... ;-) )no fumbling around with attributes on nets, etc. The symbol creator is simple, but robust, and includes the ability to build non-homogonous parts (ex. - the relay part, which has separate coil and contacts so they can be in different places on the schematic.) It is quick and intuitive, and of course interfaces quickly to PSpice. Some gotchas - the symbol library and model library need to be added in separate places, I still think there are few issues in heirarchy that can crop up, and all the developers of the code are no longer with Cadence... 8-)

Charlie

Reply to
Charlie E.

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