Quadrature encoder "decoding" - simple problem?

Detect an edge (either signal) and look at the state of the other signal.

IIRR, if you use one output - here the A pulse - to clock a D-type bistable, and hook up the B output to the D input of the bistable, the Q output of the bistable is a - mostly - stable Up/Dn signal.

I'm not sure what you mean by "detents" in this context.

There's a way of doing the same job with non-clocked logic, which you can find in the circuit diagram of "digital" decoder 2 in the the 4046 phase-locked loop chip. Again, since I can't decode the significance of "detents" in this context, it may not work in your application.

Bill Sloman, Sydney

"Detents" suggests he's using a panel encoders - not the free turning type but one of the lumpy ones.

Sure, but what has that got to do with the data-stream he's trying to decode?

The older parts all had LED/phototransister hardware to detect gear teeth going past, and some of the more modern ones used Hall effect detectors and magnetised discs, but neither has any direct connection to the detent mechanism that keeps the knob in one place when it isn't being actively twiddled.

What he's said could be interpreted as meaning that the B output is undefined when the knob is mechanically locked in place, which could be awkward, but since it would also mean that the B output was well- defined when the A-output switched a clocked bistable based decoder should be perfectly happy.

I always use a micro- foolproof and it doesn't require extra parts.

If it's mechanical (not optical) you'll need to debounce the A pin; something like an RC circuit into a Schmitt trigger gate (or buffer or inverter).. might as well do both pins. The time constant needs to be something like 5-10msec. Or use a micro.

For your (b) choice, the clock pulse (say positive edge) is generated by the debounced A (A'), and the UP/DOWN is debounced B (B').

For your (a) choice you can "AND" A' and B' for (say) Clk_up and "AND" A' and /B' for Clk_dn (both NEED to be debounced in this case)

A single 10-cent HC132 and 2 RC networks will give you all four outputs (plus pullups), so maybe 3 parts total.

Best regards, Spehro Pefhany

Yup -- as long as you don't mind switch bounce on your clock signal causing multiple "up" or "down" pulses where only one should be generated.

Do you remember your Karnaugh maps? This is a pretty easy exercise, and IIRC it can be done using a clock and one or two pairs of D flip-flops to remember the previous state of the encoder and some XOR gates to generate the pulses.

I vastly prefer to use a scheme that pays attention to both transitions of both A and B signals -- that way, a bouncy switch will always get you a correct sum of up and down pulses to land your counter in the right spot. The "latch the state of B on the transition of A" translates into a prayer that says: "God, I would like to build a system that is really easy for you to f**k up in the field".

So: four chips, a 555 and three 74xxx. Delete the 555 if you have a clock source already.

Clock the quadrature channels into a 4x D flip flop, to get a once- delayed and twice-delayed versions (this is so your combinatorial logic will give you whole pulses -- you want that). Call the once-delayed versions A1 and B1, and the twice-delayed versions A2 and B2.

Then, assuming that I'm getting my math right:

up = (not (A2 xor B1)) and (A1 xor B2) down = (not (A1 xor B2)) and (A2 xor B1)

It's a continuous rotation (obviously) device with mechanical "rest points" ("lumpy" as Spuckle said).

More info from the old Digikey cattledog:

Because the B output is "undefined" at detent positions (that's where the B transition occurs) there are going to be unwanted B changes on the slightest rocking of the shaft, passing vehicular traffic, earthquakes in Brazil, or ... Debounce alone is unlikely to remove this.

This means that "normal" dual-D f/f approaches are going to create unwanted output that is going to majorly stuff up the operation. Given that there are rest positions occurring at the midpoint of the A pulses, it seems "common sense" to use the A transitions to sample the B value as there won't - or at least shouldn't - be rocking of the shaft midway between detents.

Geez, that was the best part of half a century ago. Bit of a stretch ;-)

Indeed, and in a detentless rotation that might cut it. But (as I replied to Bill) the fact that the B transition occurs at detents means there will be potentially a LOT of B transitions that are meaningless, but will stuff up any alignment between incremental rotation and counter state.

On a sunny day (Fri, 23 Nov 2012 07:35:43 +0800) it happened who where wrote in :

Yes, yes, as you seem to want to decode rotation, the rotation of the earth and the movement of the sun around the black hole at the center of our galaxy also needs to be taken into account. Maybe a simple acceleration sensor, plus some radio telescopes pointed at out of galaxy quasars would be a start.

No

found this in a ~13 year old post, time flies ...

clk-+----------+-------------------|>o---+ | .----. | .----. _ | A >---|D Q|-+---|D Q|-----\\ \__ | +-|> | | +-|> | +-//_/ | | | '----' | | '----' | | | | +------------+ | | | | | _ | | | +--------------\\ \____________________direction | | +--//_/ __ | | | | __ +----\ \___count | .----. | .----. | _ +-\ \___.--/__/ B >---|D Q|-+---|D Q|--+--\\ \_.--/__/ +-|> | | +-|> | +-//_/ '----' | '----' | +------------+

-Lasse

On a sunny day (Fri, 23 Nov 2012 06:07:19 -0600) it happened John Fields wrote in :

I would not put a MOSFET gate input in an industrial environment exposed like that if any wire length is involved.

You may find our Rotary Decoder chips to be what you're looking for:

that

And it still has the rocking problem anyway. This is easy to fix by using a simple state machine, where no single input transition produces an output pulse. The exercise for the student is to prove that such a scheme doesn't lose one valid update when the shaft changes direction, no matter where in the cycle it does it.

Cheers

Phil Hobbs

Oddly enough (aka coincidentally) I was looking at them a couple of hours back. Normally I wouldn't go for a single-sourced device but the resulting parts count and board space make these quite a proposition.

Interesting, looks like they are pre-progged PICs.

It would probably fit into a PAL/GAL and certainly a small CPLD. OTOH, one could offload the entire interface by using one of US Digital's chips to a counter or use one with a built-in counter and just read it when desired.

Sure, easy enough to write your own program.. chips such as the low end PIC12F508 are about 50 cents each if you buy $12 worth, but you might want to use one with a good BOR. Complete MPLAB development system is about $45.

A chip like this one (92 cents @25pcs)

has a good BOR, and nonvolatile memory built in so it could be programmed to retain position memory between power cycles