Need a Comparator that will ignore glitches

put a 1 meg resistor in series with the comparator output, a 0.1uF capacitor to ground, and run that into a second comparator, other input set to 1/2 Vcc ?

Where is the spike? What does it look like? You can either filter the input(s) to the comparator, or you can filter the output.

Filtering the output would probably be done based solely on time criteria (like you said). A retriggerable one-shot will do it in hardware nicely. There are also shift-register/counter based debouncing chips in old catalogs (e.g. MC14490).

Also there are power-on-reset chips (maybe under "supervisory power" in the catalogs) that incorporate all of a reference voltage, a comparator, one or two time constants, output drivers, sometimes output switching, etc. TL7700 series is somewhat fundamental and Maxim others have some pretty fantastic riffs on the theme.

Filtering the input(s) is based on more of RC time constants, and might be set up so that the time delay for a large deviation is small, but the time delay for a small deviation is long.

Tim.

Um, a resistor and a capacitor RC filter maybe?

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See...

for a variety of ways to do this.

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
|  Phoenix, Arizona            Voice:(480)460-2350  |             |
|  E-mail Address at Website     Fax:(480)460-2142  |  Brass Rat  |
|       http://www.analog-innovations.com           |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.

That's almost nice.

What about an open collector comparator with a 1M pull up resistor to the micro-processor supply and a 100nF capacitor to ground?

Assume CMOS inputs in the micro-processor that 'go' at about 1/2 Vdd and ignore leakage currents (not) and don't worry about the comparator output being able to discharge the capacitor without blowing up (not).

Because it is better at sorting out 'spikes'....... slow charge, fast discharge.

DNA

I considered that by decided it was too kludgy-- you pointed out some of the drawbacks, and a few more too:

You can't add hysteresis to the comparator when you're slowing down the output...

well you could by having a stronger pull-up resistor, then a series 1M resistor heading out.

And who knows what happens to the CMOS input if it's held near the 1/2 level? Higher power dissipation at the very least. Maybe oscillation?

If the 100 ms applies, regardless of the magnitude of the excess, than a linear filter will not do it. It will take a combination of comparator and timing functions. What you are describing is a system that must see a continuous excess for a fixed period of time, before it puts out a detection signal. Any drop back below the threshold before the time has expired must reset the timer.

Sounds reasonable. An LM393, a 100K 4-resistor network, and a 1uF X7R ceramic cap should do the trick. About 20 cents and 3 parts.

Best regards, Spehro Pefhany

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--- That won't work.

Assuming that the comparator can source _and_ sink current, which is what I think you're assuming, then the cap will charge during the time of the positive glitches and discharge during the time when there are no glitches, but _at the same rate_. That means that if you have a lot of glitches, but not as much quiet time, then the cap will be able to charge to the trigger threshold of the second comparator just because of noise.

A better way would be to put a diode across the resistor with its cathode on the output of the comparator. That way the cap would be discharged at a much higher rate than it would be charged at, making every positive input to the comparator the beginning of a new event, neglecting second order events like the diode's Vf and the capacitor's bleeddown time through the comparator's output transistor's R(ce)

Another reason that won't work with common comparators like the LM393 is that the output can't source current, it can only go open-collector when the + input is more positive than the - input. It can, however, sink current (about 4mA to keep Vce(sat) low).

That means that instead of being in series with the comparator's output, the timing resistor has to be connected like this:

(View in Courier):

. . . Vcc . | . [Rt] . |+\\ | . | >--+--- . |-/ | . [Ct] . | . GND .

That way, when the comparator's + input goes higher than its - input its output will go open collector and Ct will charge through Rt in accordance with T = RC.

However, when the comparator's + input goes lower than its - input the comparator's output transistor will turn on and will quickly discharge Ct.

Notice that in this configuration the diode isn't needed since the comparator's output transistor is fulfilling that function when it's turned on.

Your second stage will work OK, and here's the circuit for both the first and second stages with an LM393 as the comparator:

. .Vcc>---+--------+-----+----+ . | | | | . [R1] [Rt] | [RL] . | | | | . | | | | .Vin>---|--|+\\ | | | . | | >--+ | | . Vth-> +--|-/ | | | . | +----|+\\ | . | | | >--+--->OUT . +--------|----|-/ . | | | . [R2] [Ct] | . | | | .GND>---+--------+-----+-------->GND . In order to minimize parts the reference divider, R1R2, is used for both stages. The threshold for the first stage only involves setting the ratio of R1 to R2 so that Vin must be more positive than:

Vcc * R2 Vin> ---------- R1 + R2

That voltage will also be the trigger point for the second comparator, so the interval from Vin going high to OUT going high can be found from:

T = k Rt Ct,

where:

Vcc k = ln ----------- Vcc - Vth

Arbitrarily setting R1 equal to R2 will make Vth half of Vcc so, if Vcc is 5V, Vth will be equal to 2.5V. Then:

5V k = ln ----------- ~ 0.92 5V - 2.5V

Now, since:

T = k Rt Ct,

if we arbitrarily choose Ct as being 0.1µF and use the OP's 100ms delay we can rearrange to solve for Rt:

T 0.1s Rt = -------- = -------------- ~ 1.1 megohms. k * Ct 0.92 * 1e-7F

For a really noisy Vin, a comparator with rail-to-rail inputs could be used and Vth brought closer to Vcc, which would also result in a smaller Rt or Ct (or both) being used.

-- JF

--
Oops...
 
     k = ln 2 ~ 0.69
>
>Now, since:
>
>
>     T = k Rt Ct,
>
>
>if we arbitrarily choose Ct as being 0.1µF and use the OP\'s 100ms
>delay we can rearrange to solve for Rt:
>
>
>             T            0.1s
>    Rt = -------- = -------------- ~ 1.1 megohms.
>          k * Ct     0.92 * 1e-7F
>

what I think you're assuming, then the cap will charge during the time of the positive glitches and discharge during the time when there are no glitches, but _at the same rate_.

I shudda explained further: I just assumed everybody knew that comparators by tradition are open-collector outputs. So you definitely need a pull-up resistor on the output. And since (although it wasnt specified) you probably want to err on the side of rejecting noise, you probably want a faster run-down that run-up, so you want to use a bigger effective pull-up resistor than the series resistor. Which will happen if you use a pair of 1Meg resistors-- one pulling up, the other in series. The pull-up will be effectively through 2 megohms, pull down 1Megohm.

Nice analysis BTW.

Did **I** say that... I don't think so, unless it dates to prior threads ?:-)

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
|  Phoenix, Arizona            Voice:(480)460-2350  |             |
|  E-mail Address at Website     Fax:(480)460-2142  |  Brass Rat  |
|       http://www.analog-innovations.com           |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.

--
I know great minds are sometimes indistinguishable, but that wasn\'t
JT, it was JF. ;)

Thanks, but the point is that you don\'t need the series resistor at
all, since all it\'ll do is slow down the discharge when what\'s
needed is for the discharge to occur as quickly as possible.