Q: IXP425 CPU (over) clock ?

How do you think the system should detect the changed speed ? If the single OSC is changed the system time will be faster together with the CPU and thus the speed test results in the same value, even though the working speed is faster. _Hopefully_ the Ethernet, serial port and USB clocks are not derived from that OSC, otherwise you will see communication problems.

-Michael

Hello,

I do not have any problems with ethernet or USB.

The bogo mips with teh original settings is somewaht around 133, because a set of resistors forces the CPU to slow down to 1/2 of the nominal CPU speed.

If you remove one resistor, you "de-inderclock" to the CPU frequency of

I expected the CPU speed (bogo mips) to show more than 266 after the OSC replacement.

I startet with just 3 MHz more, because I wanted to try it stepwise from slower to faster.

As far as I know, the 266 MHz is derived from the OCS-freq. multiplied with a certain factor. The factor will be 266MHz / 33 MHz = 8,060606...

I expected the CPU speed would be about 36MHz * 8,060606... = 290 MHz after the replacement. Furthermore, I expected that bogo mips will calculate the value, not just printing a preset value.

At the moment, I wonder if the CPU is limiting the incoming osc frequency by itself. But I cannot find any clues, that this might be the reality.

Bye, Heinz

Please re-read my post.

A frequency, bogo-mips or whatever speed measurement needs to be made against a known clock. So the de-underclocking should show with the bogo-mips, as the timer used supposedly is running at the same speed as before. Unless there is a second OSC, the timer runs faster, too, if you change the OSC speed outside of the chip. So the measured CPU speed value will be the same even if the CPU runs faster.

-Michael

Hello,

I would say that the system is measuring against the RealTimeClock as an independant source.

BTW, how do you think the system is detecting speed? In my opinion, it has to count cycles and compare it with a reference souce, e.g. the RTC.

Am I wrong?

Heinz

... but does the CPU "know" about the external oscillators frequency?

I cannot imagine, that the CPU knows that there has to be a 33MHz osc somewhere on the PCB and that by definiton the CPU speed has to be 266 MHz.

As far as I understood the ixp425 manual, intel is manufacturing the CPUs in three different speeds.

That brought me to the conclusion, that the cpu might be able to somehow reduce the clock that is entered into the clock in pin. But that is very vague.

Bye, heinz

How should it know ? The OSC does not have a communication channel to tell the CPU at what speed it is supposed to run.

You need to use software to set the internal clock speed generation (derived from the osc input) for the CPU and the hardware timers and the software timers of the OS according to the osc used, if you want that e.g. the jiffie ticker works as expected.

That is just the max speed the chip is guaranteed to work with. It can work slower if using another osc and/or setting other parameters by software/hardware configuration. Now it will consume less power.

It can't. but it can set parameters for it's internal clock generating hardware and modify it's running speed by that.

-Michael

Is there a separate crystal for the real time clock on the PCB ? If yes this is possible. You would need to look at the Kernel source to be sure.

Of course you are right, but I suppose that there is a software module that calculated the speed and another module that creates some kind of ticker that is used by the first one. Both might depend on the board you are using by means of Kernel configuration and/or special source code.

-Michael

The RTC is usually only used to set a counter at system start. The counter is then run by a timer which, on a typical ARM ASIC is derived from the system clock.

Kind regards,

Iwo

Heinz Rohde a écrit :

No you are right, but what if your RTC is using the same clock source as your chip?

The IXP425 has The IXP42X product line and IXC1100 control plane processors consists of four internal timers operating at 66.66 MHz (which is 2 * OSC_IN input pin.) to allow task scheduling and prevent software lock-ups. The device has four 32-bit counters: Watch-Dog Timer Timestamp Timer Two general-purpose timers

If you want to be sure of what timer is used, take a look at the Linux kernel source.

Laurent