ARM now as powerful as Intel chips

ARM now as powerful as Intel chips

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A 3.1GHz dual core ARM is out which probably means it will outperform any Intel CPU where instructions per second bottleneck is a problem.

Big news for Linux.

These devices ought to bring higher than desktop PC performance to mediocre netbooks and tablets on a low power budget and probably leave you wanting nothing more than beyond that for all your every day office and browsing needs.

Since Linux runs on parallel supercomputers, putting 2 or 3 of these ARM chips and getting a parallel Linux distro up and running on a tablet with probably take your tablet beyond where gaming is stuck at with windopws. Any electronics engineer could get this done.

Get coding I say! :-)

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But will the arms be data alignment tolerant like the Intels are?

Reply to
OldGoat

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It will probably be as tolerant as x86/amd64 - i.e., misaligned data works for simple stuff, but at much lower performance, and completely screws any difficult things like precise ordering for inter-process and inter-thread communication.

Reply to
David Brown

Finally! I've used a number ARM cores (ARM7, ARM9, StrongARM) and none of them ever support misaligned data. But, neither did the SPARC, 68K, PDP-11, and many others -- so it's not like anybody with a clue expected misaligned data access to work without checking the processor specs).

It looks like the ARMv6 and ARMv7 do -- at least for simple load/store operations. There appear to still be alignment requirements for the fancy bits like multiple-register load/store operations.

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Reply to
Grant Edwards

That's correct, as far as I can see - misaligned accesses work but not for multiple register operations. I'd guess you also need to keep the stack aligned. So Cortex M3 (and M4) and Cortex Ax can work with misaligned data.

Some 68K devices (including the 68332 and the Coldfire) can work with misaligned data too.

I don't see it as a big issue, however.

Reply to
David Brown

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Sounds like the ARM community is making inroads then.

Reply to
OldGoat

Right now in the Apple camp there was an issue of misaligned data on their ARM chips. IIRC, the Xcode newsletters I receive, had an article and one poster had a major problem with it. Consequently, the Apple dev team pointed him to an IBM site on misaligned data and how to code for it properly. Rather interesting topic.

Reply to
OldGoat

ARMv7 changed the alignment semantics for reading words from non-word-aligned addresses. This caused a whole pile of pain for people who were using code from the ARMv3 era where compilers used non-word-aligned accesses to achieve some speedup tricks (eg on 16-bit values before LDRH existed) - after all, such accesses were explicitly documented in the ARM ARM. Alignment exceptions on the ARMv7 kind-of cover this, but with a big performance penalty (every memory access being trapped is not good news).

Bottom line is, don't rely on non-word-aligned accesses, because the semantics may well change underneath you and bite you in the future.

Theo

Reply to
Theo Markettos

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