Hi,
this is a "public backup" of a holiday project maybe it's of use to someone:
- "medium" ZPU processor
- instantiated BRAM and upload of program code via DATA2MEM. Re-compiling the C-code and uploading a new bitstream takes about three seconds, which isn't too bad (I use Xilinx' platform cable USB; the Saturn V3 should also support xc3sprog upload by itself)
- basic LPDRAM access as "proof-of-concept" using the Xilinx DRAM controller
- basic VGA, connect with Dupont wires to an analog RGB monitor input
- timing is met at the default 100 MHz clock
- address decoder with support for zero-waitstate reads (i.e. from hardware registers)
- performance is almost 1M 32-bit read/writes from DRAM per second, three times faster in internal BRAM. A speed demon in slow motion...
- 9 % slice utilization (6 % LUT) on Spartan 6 LX45
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