xst can, but vcomp can't

Synthesis with Synopsys DC is even worse. It does not even allow

my_gen: if N in 0 to 7 generate ... if rising_edge(clock_vector(N)) then ... end generate;

You could select the clock-signal out of the vector before calling the procedure. Then you feed only the selected signal to the procedure.

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Hmm ... dual-edge behavior? Do you want to model synthesizable code? Have a look at

Ralf

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Looks like an idea.. Can I call a procedure from another procedure? In that case I can try write a new procedure to extract the bit and pass it (as inout?) to a clock detecting procedure using a clean bit. Hmm.. not sure if that will work tho.. Gotta try it. I am not really trying to use dual edge here. I only want to program my cpu_register to be able to detect a rising of falling edge from my system depending on a constant input parameter (here, the input variable 'neg'). Thanks for suggestion and the interesting article :)

Sounds like something that is worth to try. I can't tell you if it will be accepted.

But what you have written is a something like dual-edge flipflop. If you want to detect edges of a signal, use 2 flipflops in a chain. The first samples the input data, the 2nd samples the output of the first. Now you can compare the output values of both flipflops. If the 1st has '0' as output and the 2nd '1' you got a falling_edge and the same holds for the rising_edge. The disadvantage: You have a delay depending on your sampling frequency.

Ralf

I'm assuming that "neg" is a constant?

Try declaring neg as a constant parameter, or using an entity with neg as a generic.

If you can tolerate a delta delay on the clock in simulation, you could xor the clock with neg and then use only one edge specification. The xor with a constant will get optimized out.

True DDR circuits are possible with s>

A lot of synthesis tools will refuse to do something with such a process. They see two 'event conditions and finish with an error. That is the reason why I have suggested to model this "pseudo-dual-edge flipflop" manually.

Ralf