Xilinx XST Incremental Design Change

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I have a bug and it seems to manifest itself only
in stealth mode. When I move my LEDs to see what
the trouble is, the bug goes away.

I am using Xilinx XST v7.1, a ML403 dev board, and
the issue seems to happen during powerup. A certain
action freezes and Reset does not help. Timing is
being met.

I would like to add LEDs to debug the problem without
there changing the circuit as little as possible.
Is there a way to do this with incremental design change
and how do I do that? Can I nail all the logic to the
same LOCs? Is there a TIG-like constraint that would act
from the LED output backwards toward the source?


Brad Smallridge
Ai Vision

Re: Xilinx XST Incremental Design Change
Hi Brad,

This might be an even better solution if you know exactly where you
would like to probe.  After PAR, you can open FPGA editor and insert a
"probe"  (See right-hand column of FPGA editor -- Add Probe).  This
probe is essentially a route connected directly to your net of
interest, and it can be routed directly to a spare pin -- at which
point you could probe it (or drive a LED I guess) to help you debug
your problem.

FPGA sorts out the primitives, nets etc. out for you in a logical
manner so you should be able to trace down the net of interest.  FPGA
editor will also provide you with a timing estimation (ie delay due to
routing) of skew that will occur between the IOB and the net of

The nifty part of this solution is that you will be able to probe your
problem AFTER synthesis  and par -- so you are probing your EXACT
design of interest (ie your problem can't 'go away').

Hope that helps

Avnet FAE

Brad Smallridge wrote:
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Re: Xilinx XST Incremental Design Change

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Worked OK once. But crashes on some other attempts. I might not be running
it right. I do a BITGEN from the Probe menu. There seems to be no way
to save the editted route.

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Yes it seemed to work properly once. If I can figure out how to make
it work consistently, it will be a great tool. Thanks.

Brad Smallridge
Ai Vision

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