Xilinx vs Altera high-end solutions

Jason Zheng wrote: (snip)

Following the unix analogy, where some low level parts might be written in assembly, write the generic HDL, and then replace specific modules with custom versions to get the extra performance.

-- glen

Glen,

Good idea. Don't work too hard. Let the synthesis tools to their best, and then see where they did not do what they "could" have to get the best performance.

This is something that our FAE's help our customers with all the time: getting that last little bit out of the design (so that they may buy a smaller part, or a slower part, and save $$).

Aust> Jas> (snip)

Austin,

No offense, but would you please stop top-posting on news groups? Bottom-posting is easier to read, especially when quoting several responses. This website has more explanations on why:

Jason

True about the low-level assembly part, but you missed the point. Minimizing, not celebrating, such low-level components is the reason for Unix's succsess. On a side note, one of the trends in OS development is to shrink the kernel and to standardize the kernel interface. All of that makes it easier to port application programs from one unix system to another.

It is true that you cannot avoid doing low-level stuff in either software or hardware design. But the less you have to think in the lower-level abstraction layer, the more time you can spend in improving the high-level architecture.

-jz

Don't tell anyone, but the generic synthesis templates born in Leo and Synplicity are getting covered by XST and Quartus as well. The multiplier/accumulator templates work. Block RAM/ROM and the FIFO style dual-port RAM has worked for years. Carry-chain counters, shifters, state sequencers, etc work for just about any reasonable description.

The black box list is getting quite small. PLLs and full dual-port rams are all that come to mind.

Yes, I would say most. I am a bit baffled to find a use for multipliers in non-dsp applications. Maybe I should be calculating Pi as a background process :)

Quartus synthesis wins my most-improved award. It was once the worst vhdl synthesis on the planet. Now it handles all my code just fine. I use leo mainly because it is faster, covers all the devices and has a better rtl viewer.

-- Mike Treseler

Leave it to the posters, please, to choose the posting style.

If you're reading the newsgroup regularly, you're familiar with the deiscussion threads and don't always need to review.

Many newsreaders open the message and response for top-posting friendly operation.

I often skip messages entirely that are bottom posted because the topic is

*probably* not of interest and it's not worth the bother of scrolling down to see if there IS something interesting.

It is NOT always "easier to read" it's just easier for you.

- John_H

Jason,

My preference is for top posting.

I am sorry it offends you, but I think "top down", not "bottom up."

I will just erase the other stuff, as it usually has not value in the post anyway.

Austin

And:

MGTs, Power PC's, EMAC's, APU's.

Lots of things that synthesis does poorly, or not at all.

Oh, but Altera doesn't have any of these .... so they would not want to direct your attention to items that they are completely missing (in their product offering).

Austin

Thanks for the good laugh.

While this may hold fine for small designs, my humble experience is that the synthesis tools behave so non-linear with complex ones that even Mr. Spock would tremble. Change a bit here, resize a vector there, swap your tool version and your costly performance analysis and custom optimization --including your manual, wrist straining P&R-- are valid no more.

However, I have found that most of the tools behave generally well after pipelining your design. *If* you break your signal flow and processing adequately, the register-isolated parts are treated again as 'simple designs' by the synthesis tool and you are back on track.

Cheers.

-- /"Contrary to what my colleagues have told you PabloBleyerKocik/ about the bleak prospects for silicon transistors, pablo / I happen to have a few of them here in my pocket." @bleyer.org / -- Gordon Teal at one 1954 IRE conference.

I very much disagree.

Before Google changed their format they would only display the first 30 or so lines of the message. You would have to follow a link to get the rest. Then, when you came back to the thread, you were redirected to the start of the thread, losing your place in the thread. You were left to your own devices to locate the last message read. What a pain, especially for the 1-2 line responses!

Tom

BTW, if you want to start imposing netiquete on everyone else please get yourself elected dictator first.

Jas> > Jason,

out of

part, A

smaller

Whether what google groups did was good or bad is still questionable. You cannot judge the merits of style based on ONE application that you use to access newgroups.

Tom, and to all those who insist on top-posting, what I said was merely a suggestion to a user Austin, because she quoted a few posts that have a top-down chronological order, and she put her replies on the top. And that annoyed me a bit. If it offended anyone, I'm sorry.

to

Howdy Austin,

What is this?

True is isn't a full PPC, but they have processors too:

I suppose APU is an arithmetic processing unit, i.e. a DSP block - you know, the one that had an accumulator long before Xilinx:

Have fun,

Marc

Well, you've one upped me. Things have gotten heated between Austin and I before, but I don't think I've ever called him a her ;-)

- Paul

Oops...My appologies, again.