Xilinx vs Altera high-end solutions

Hello,

I am interested in opinions concerning advantages and disadvantages of the hardware (FPGAs) and developing software (Quartus vs ISE) for high-end (very demanding designs). I was under the impression that xilinx was ahead but I've done some reading lately and StratixII seems to have made a step ahead in comparison to Virtex4. The devices I am interested in are Stratix and StratixII from one side and VirtexII pro, Virtex4 one the other.

There is not one specific parameter that I need to investigate. Procesing power, memory and I/O data rates are all significant.

Of cource the role of the EDA tools is important so if someone could give me his opinion one advantages and week points of each one I would be grateful.

Thanks

Reply to
Giorgos P.
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give me

grateful.

Howdy Giorgos,

Asking such generic questions are bound to either get you generic answers, or FUD from the vendors. The short answer is that after availability, quantity, price, and features are all factored in, each has its own strengths and weaknesses, yet each is also a capable FPGA. For some things, Stratix II will be fastest, other things Virtex-4 will be fastest, and a few others, VirtexII-Pro will be fastest.

Without a fair amount of detail on the "specific parameters" of your design, it is impossible to guess which might match up best. Or beter yet, get the tools for both and try targetting your design to each.

Good luck,

Marc

Reply to
Marc Randolph

You are asking for a holy war !

Both Altera and Xilinx make FPGAs. Som epeople like A, others like X. If you just go by marketing numbers, you will never be able to decide which one is better. When we had to make the choice, we downloaded the free tools, and tried a bunch of designs (you can download various sample designs from OpenCores.org if you need some).

1) Try both (free tools), look at the sample results 2) Look at the ease of use of tools 3) Look at support (do a search in this group for answers from X and A, perhaps thats not a fair comparison as there are alot more X users here than A users) 4) Make your own decission

Shouldn't be that difficult.

Regards, rudi ============================================================= Rudolf Usselmann, ASICS World Services,

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Your Partner for IP Cores, Design, Verification and Synthesis

Reply to
Rudolf Usselmann

Just a quick note -- be sure to use real-world designs and push the tools on performance. Using "toy" designs (say, a 32-bit adder or a

4-bit multiply) often doesn't give you the full story.

If you plan to buy any volume, then this group will not be a good example of support. Both companies will fall overthemselves for your business if you are buying any quantity. There are distributor FAEs, factory FAEs, and others who will hold your hand and give you a back-rub if it helps you be successful with their product!

If you are serious about buying high-end products, your best bet is to try out the tools and invite salespeople/FAEs from both companies in to compete for your business.

Oh yeah -- pick Altera ;-)

Regards,

Paul

Reply to
Paul Leventis

Consider deferring the vendor and part selection until after you have prototyped and simulated a substantial portion of your design in vendor-agnostic hdl. Use synthesis to pick a device from each vendor and then get quotes.

-- Mike Treseler

Reply to
Mike Treseler

Mike,

Sounds good, but I believe it doesn't work that way.

If you know you are going to use part A, or part X, you will then use the powerful built in features that each vendor offers.

For example, Xilinx SRL16's are great for many DSP and signal processing tasks. The Xilinx/IBM PPC are also very useful. Many of these features define an architecture. Altera has a similar portfolio.

Pick a generic HDL, and code without regard for these special features, and then you are at the mercy of the HDL compiler to somehow find the best structures in each FPGA.

For high end designs, you will have to take advantage of the manufacturer's device specific feature set to get the performance you want for the least cost (smallest) and fastest device/design.

Aust> Giorgos P. wrote:

Reply to
Austin Lesea

Good advice. But be sure to use the post P&R performance and logic-utlization results to select a device. Synthesis estimates are less accurate and while they can be pretty good on average, for any given design could be far off the mark. Also, register packing (grouping logic & registers) for Altera devices happens in the P&R flow, which will substantially reduce your logic requirement.

Regards,

Paul Leventis Altera Corp.

Reply to
Paul Leventis

It does for me.

Many do, but I don't. If the feature can't be inferred from code for both vendors, I'd rather not use it.

-- Mike Treseler

Reply to
Mike Treseler

I agree. I run both place and routes from time to time to make sure I am on track.

-- Mike Treseler

Reply to
Mike Treseler

I thought more often than not it would be largely decided by past experience of your EEs on the project since the A v X varies over time as new parts are released. Have you asked your group members what they prefered?

regards

johnjakson at usa dot com

Reply to
JJ

Mike,

Then you are not a high end user.

Aust> Aust>

Reply to
Austin Lesea

We are a pretty boring group here at Danaher/Fluke Networks. We do packet processing for WAN/LAN monitors at OC3/OC12/DS3/GigE. We don't do much with the multipliers and the on-chip CPUs, but we are pretty good at negotiating FPGA prices.

-- Mike Treseler

Reply to
Mike Treseler

Mike,

The synthesis tools are pretty good at inferring multipliers/MACs from HDL, as well as other higher-level primitives. So your "vanilla" approach to design may still take advantage of some of the hard blocks available.

I should point out that you should see very good performance in Stratix-II without any architecture-specific coding. Quartus will automatically balance multipliers between LEs and DSP blocks, and also automatically handles the mapping of generic RAMs into the three available RAM types in the device. We like to make things as easy as we can on our users, otherwise these features would go unused in many designs!

Regards,

Paul Leventis Altera Corp.

Reply to
Paul Leventis

Mike,

You know your business, that is for sure. And based on that, you make decisions. We have a number of customers who treat FPGAs as a commodity.

Use no special features. Generic HDL only.

Not my favorite model, but I know some folks use it.

Aust> Aust>

Reply to
Austin Lesea

use

How silly.

You can infer DDR registers, shift-registers (which map flawlessly to SRLs), and even a number of math functions (which map to the latest V4 DSP48 blocks). What else does it take to meet your criteria of being be a high-end user?

Have fun,

Marc

Reply to
Marc Randolph

I'm a big supporter of using generic HDL, because it makes your design portable. It's portable not just in a sense that you can synthesize the design on different platforms TODAY, but also that you can easily apply it to TOMORROR's hardware. Portability is one of the big philosophies behind the UNIX movement (and yes that is software, but the idea is the same). Without it, UNIX wouldn't have survived past PDP-11.

My point is, utilizing some special features may get you 20% more performance today. But next year, some other vendor might come up with a good platform that runs 50% faster than your current vendor's platform. If you use generic HDL, very little, if any, efforts are needed to move on to the better technology or platform. Whereas specialized HDL designs will soon require too much effort to keep up with the new technology.

Finally, the less technology-dependent your design is, the easier for you to leverage the advancement of the synthesizers. Maybe the synthesizers today cannot imply some of the logics to optimal components, but tomorrow they will be able to.

Having said so much about generic HDL, I also insist that HDL designers should know what exactly they are designing. Sometimes what the synthesizers generate is not what you really want, in which case you have to step in.

-jz

Reply to
Jason Zheng

Hi Paul,

I'm good with back-rubs, but I specialize in Shiatsu, which helps a great deal but isn't pleasant at all.

Ben

Reply to
Ben Twijnstra

Well he asked for opinion Al vs Xi and here is my frank ones. The X men have literally flooded the market geographically as well as through their wares and it is definitely easier to get hold of them or their chips.. Infact the above factors alone many times dictate the choice of device rather than their actual performance and cost. We are a design consultancy and distribution services firm -xilinx being one of them. And I havent heard my colleagues in design speak of let alone try Al for the designs. I felt I was blindsided with all this marketing and patronising attitude of xlx presence and downloaded a web version of quartus-2 for taking a look at the other world sans xilinx. I find the tool cool and very methodical in its workings and good qor. Well thats for me as an individual and I cant see myself convince managers here to checkout those. They instinctively believe that xilinx is the FPGA.

Reply to
Neo

"Neo" schrieb im Newsbeitrag news: snipped-for-privacy@z14g2000cwz.googlegroups.com...

Hi Neo,

you are not the only one who has looked at Altera Quartus for 'second opinion' and yes the Altera tools are easy now as are the Xilinx ones, there are some differences but those are mostly only a matter of taste and personal preferences. for both X and A, you create a project, select part, add source, assign pinlock then hit compile then start programmer and hit program and you have a working silicon. Even being X man, I have to admit that the SignalTap is probably easier to use (even when not so powerful) than ChipScope and that the Quartus programmer is a bit better than iMpact (what is actually a nighmare in my opinion). I was also impressed when i did see the Altera Eclipse IDE to succesfully configure and compile NIOS II uClinux kernel and filesystem on Windows machine, doing it for Microblaze requires compilation on linux host so far.

Antti

Reply to
Antti Lukats

Jason,

All very good points.

My point was simply that a power user trying to get the last 2 ps out of their design usually ends up using the features specific to that part, A or X.

By doing so they often can use a lower speed grade part, or a smaller part, and save a lot of money.

(No offense intended to anyone).

Aust> Aust>

Reply to
Austin Lesea

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