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Xilinx V2Pro DCM config and settling time questions

Hi all,

I need to generate a 20MHz clock from a 10MHz clock on a V2Pro.

Plan is to use 2 DCMs:

1st DCM: 10MHz into CLKIN Use CLKFX output with default of M = 4 and D = 1 to get 40MHz. I need to leave CLKFB unconnected I think because CLK0 and CLK2X will be below 24MHz. Also, since I am using CLKFX, I can leave CLKFB open since it is ok for my CLKFX clock to be out of phase with the input 10MHz clock.

2nd DCM:

40MHz from 1st DCM into CLKIN 20MHz out of CLKDV CLKFB gets CLK0.

First question - will that all work?

Next question:

The input 10MHz clock can be varied by +/- 25 parts per million to give a frequency offset.

So, input clock period is (1/10e6) +/- 2.5ps.

The +/-2.5 ps seems to be way less than the cycle and period jitter spec of the DCM so I am not worried about that.

The input clock will be held at each offset for 20ms minimum. Also, there is 800us available for the DCMs to adjust to the new input frequency.

I see that the lock time of the DCM is 10ms and I assume this is just at configuration time?

So, am i right in thinking that my DCM cascade will track my freq offset when it is applied? Is there a spec somewhere that states how long it will take to adjust to the new input freq or is it instantaneous since the variance is only +/- 2.5ps?

Thanks for your time guys,

Ken

Reply to
Ken
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Hi Ken,

we're not using V2Pro ('just' Spartan3) , so I'm not sure about it's requirements for DCM-input-jitter-requirements...

But please use

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to calculate first DCM's jitter ouput and verify that it fits to second DCM's input requirements...

Jochen

Reply to
Jochen

Ken, I suggest you use Frequency Synthesis mode (where the 24 MHz min does not apply to the input, but rather to the output), and you multiply by 4 and divide by 1. That uses only one DCM, and gives you 40 MHz, which you can easily divide by 2 in a flip-flop. When you say "the input frequency will be held.." I assume that means you have a constant fequency for that time, then change to another frequency... DCMs do not like interruptions in the input signal. Adjusting to the slightly higher/lower frequency takes a few clock ticks. Peter Alfke, Xilinx

Reply to
Peter Alfke

Hi Jochen,

Thanks for the link - I'll keep that one!

I don't think I have any jitter issues however since I seem to be well within the spec of the DCMs.

Cheers,

Ken

Reply to
Ken

Hi Peter,

Excellent.

I take I cannot connect up CLKFB since both CLK0 and CLK2X will be < 24MHz?

Correct.

Thats fine. There is 800us available to adjust and a few periods of 0.1us should be fine! :-)

Many thanks,

Ken

Reply to
Ken

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