Xilinx SYSTEM_JITTER, INPUT_JITTER Questions - Part II

How are these used in the case of FROM TO specs?

For example, CLK In goes to a DCM, the CLK0 and CLK180 are used as CLK and CLKN.

SYSTEM_JITTER = 100pS INPUT_JITTER = 200pS

timegroup 1 is on CLK0 timegroup 2 is on CLK180

if I have a FROM timegroup1 TO timegroup2 of 2400 pS, how will the timing analyzer figure in the two jitter specs and the DCM jitter/skew values?

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