Xilinx promised for ISE8.1i a "free add-on module for partial reconfiguration". But I still don't see it. Can anybody give me some precisions?
Mehdi
Xilinx promised for ISE8.1i a "free add-on module for partial reconfiguration". But I still don't see it. Can anybody give me some precisions?
Mehdi
"GaLaKtIkUsT" schrieb im Newsbeitrag news: snipped-for-privacy@o13g2000cwo.googlegroups.com...
ASFAIK it is only available upon request from FAE, not freely downloadable
antti
But what exactly is it for?!? Is it something to cope with the lack of T-bufs in most recent devices, or is it a tool that only helps with the modular design flow?
A.D.
I guess you are talking about the bus macros used to interconnect static and reconfigurable modules. These are available as .nmc files (placed-and-routed macros) in the XAPP290 reference design files. The appnote also explains why they are required.
Kunal@Xilinx
We are trying to make partial reconf with Virtex4 but ISE 8.1SP1 fails during the assembly phase. We want to test that "add-on module" but our copy of ISE is provided by EuroPractice for universities and we dont know how to contact with a FAE. Any suggestion?
Javier
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