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Xilinx ML402 DRAM control

I would like to capture an display video images using a Xilinx ML402 development kit.

I am looking for advice about how to proceed.

I have the datasheet for the Infineon HYB25D256 DRAM and I also found XAPP608 that describes DRAM control for a Micron DRAM module.

I also noticed that the Platform Studio has a DRAM controller. I am not sure that I want to get into Platform Studio or deal with OPB busses however.

At first, the DRAM controller need only write data from a camera and read data to the VGA display. At different clock frequencies so FIFOs will be needed I suppose.

Can any one point me in the right direction?

Brad Smallridge aivision.com

Reply to
Brad Smallridge
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If you write your own SDRAM controller, you'll be walking in the footsteps of many a contributor to comp.arch.fpga. I suggest 3 things:

  1. Xilinx App notes on SDRAM controllers. I can't seem to get to XAPP608, but it could be the right one. There is one with sample code.
  2. Go to the Micron website and get a verilog simulation model for an SDRAM. It does all sorts of error checking and will be invaluable when you start your simulations.
  3. Read all the postings about SDRAMs in comp.arch.fpga. As I recall, there were some great discussions about signal integrity as well as controller design.

Having read all the recommended texts, I suggest that you write your own controller. An SDRAM controller isn't beyond the ability of a good logic designer, and you'll be able to tailor its performance to your project requirements.

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Joe Samson
Pixel Velocity
Reply to
Joseph Samson

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