Xilinx Logicore PCI64 Problem

I haven't used any cores released in the past year, so I'm not sure what the

The core comes with several ucf and lc files associated to either "core" or "fast". All three files will need to be included in the project. The pcix_fast.* (for 133MHz) stuff requires the use of the *_64xf.*. Use the pcix_core.* for all the other lc and ucf files. All the *_64x*.* stuff only supports PCIX mode. Hence, for a mixed PCI/PCIX, use the *_64s.*. It will only run at 66Mhz, but seems to be much easier to use than the others. You will need to maintain the same structure as in the *top.* file coming from Xilinx if you are going to use their ucf files. Either that or change the paths in your ucf files. I never use FPGA Express, so I'm not sure what additional issues that may cause.

Something else I thought of is to make sure you are using the same compile options as the example that comes with the core. i.e., don't loose your hierarchy, don't balance the registers, don't insert buffers, etc.

Hi,

Were you able to implement the test design that is provided with the core? That design is a good design flow test.

Eric

owner wrote:

It sounds like either:

a) You have changed one or more instance names within the design hierarchy so that the paths 'PCI_CORE/PCI_LC/PCI-AD64/IO31/OFD' etc. are not valid, or

b) You have allowed the synthesis tool to change the design hierarchy by flattening or grouping modules.

In my design I used the keep_hierachy XST synthesis attribute to tell XST to leave the PCI core hierarchy alone when flattening my logic. I also did a search/replace on the UCF file to change some instance names in the path so that they match the instance names I wanted to use in my design.

Mark

owner wrote:

Thanks for all your replies.

Mark,

No, I have not modify the core's vhd files at all. In fact, take this example above, the instance PCI-AD64 does not even exists. The "higher" hierarchy instances - PCI_CORE/PCI_LC/ are correct. What I found is an instance named PCI_AD64_IO31_OFD of a xilinx macro called X_FF used under the component PCI_LC.

that

May be I should try XST first, using the ping example, as suggested by Xilinx.

Thanks.

Regards, LC

Hi,

Thanks everyone for your help.

I've found the problem. I was using a newer version of the PCI logicore than that which my ISE can support. I don't know why, but ngdbuild crashes with an "abnormal program termination", saying it cannot find the ngo file.

After I downloaded an older version of the PCI core, it works.

Regards, LC