Xilinx legacy situation

We have some well-established teaching laboratory kit, using Xilinx XC4013E (optionally XC4020E for project work), with download by JTAG and a clone of Xilinx Parallel Cable III (DLC5).

As has been discussed here before, despite some statements on Xilinx Website, the latest (full-spec) Xilinx software includes an iMPACT downloader which doesn't support Parallel Cable III. Alternatively, latest Webpack 6 includes an iMPACT which supports the download, but not any flavour of XC4000 (although all the library and similar files seem to be present).

Options appear to be:

1) A kludge whereby we instal only iMPACT from Wepack 6, to get the downloading but with no integration into Project Navigator / Design Manager (so we lose revision control's updating of where to get the .bit file from). (This is what we're doing at the moment - not brilliant, but it does work.)

2) Someone spends time messing around to produce a collection of batch files which provide equivalent P&R function to Project Navigator.

Suggestions welcome - including suggestions for alternative hardware. We need to retain 5V-compatible I/O, since all our kit uses 5V levels for I/O, and much of the work involves interfacing with other bits of kit. We've also spent quite a bit of money on the XC4k ICs - total of 25 pin grid array chips, which were hideously expensive - and we'd like to get a decent return on this investment.

(In case it is considered relevant: workstations are networked PCs with Windows XP Pro, rest of development environment is ModelSim and Synplify. Students work in pairs, 12 pairs at a time in a class.)

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Tim Forcer               tmf@ecs.soton.ac.uk
The University of Southampton, UK
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Tim Forcer
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Tim, you have to get over the idea of still getting something from your old chip investment. Xilinx FPGAs have become 100 times (!) cheaper, have added functionality and better software support since the days when you bought the XC4013s. ( Anybody who tries to hang on to a 10-year old computer faces a similar situation, albeit to a lesser extent). That's the price of progress.

Your biggest stumbl>

Reply to
Peter Alfke
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Tim,

The ISE Classics software supports the XC4000E devices. I'm not sure it includes iMPACT, but it does include JTAG Programmer software for downloading.

Even though ISE 6.1i does not support design of XC4000E devices, it does allow you to program them with iMPACT.

Steve

Tim Forcer wrote:

Reply to
Steve Lass

Tim,

iMPACT (all versions, full or WebPACK install) has supported and does support download via Parallel Cable III (in fact, I have one on my desk and it works just fine) as well as configuration of legacy devices.

Note that new design bitstreams can only be generated with the ISE Classics Software.

Tim Forcer wrote:

Reply to
Neil Glenn Jacobson

Peter Alfke top-posted:

It's not the chip investment that's the *big* hangup, but the equipment investment. The chips were chosen deliberately in pin-grid-array package so we could replace as and when we wanted

- including when/if they got blown up by misuse. Throw-away ICs we can live with - even at the price of PGA 4013s. Throw-away experimental units is another ball game.

Hmmm. Doesn't explain why the majority of PC/104 processors are

486 clones rather than Pentium clones. Doesn't explain why 8051s still sell by the truck-load. Sure, we have to stay current, but we've done some very useful work with 10-year-old computers! (Old DOS boxes make excellent targets for introductory learning about embedded systems, provided you don't mind the bench space they occupy.)

If it ain't broke, why fix it? Some concepts can be taught using kit that's a lot more than ten years old. We have one experiment that uses equipment which must be around 25 years old, and part of the point is to show that important effects, very relevant to designing the latest and greatest ICs and systems, can be seen with basic testgear and almost rudimentary test rigs.

If we can teach _currently relevant_ techniques of FPGA design with ten-year-old kit (and the FPGA experimenter kits are only 3 years old), why should we have to throw the baby out with the bathwater? If the DESIGN software still supports XC4000E, why has the downloader stopped supporting a download cable which was still being sold only a couple of years ago? If the library files are still there, why can't the software be set up to access them? (After all, the guts of the software isn't the Windows front end with the selection boxes - or have I misunderstood all those command lines scrolling through, which appear to show someone using 10-year-old DOS to do the hard work rather than shiny state-of-the-art Windows?)

Look, these are STUDENTS. Second year undergraduates. Some of them only got their hands on an oscilloscope for the first time just over a year ago. Some only SAW an oscilloscope for the first time thirteen months ago. They are designing simple state machines and the like. The prime exercise culminates in controlling a three-storey model lift. That could be done by a Xilinx 1000 series device. For the PURPOSE, we don't need modern, we don't need sophisticated, and spending money when we have something already is certainly not cost-effective. We're NOT designing for production - where we have project students and researchers pushing boundaries, of course we use state-of-the-art. But at the moment we find 5V 74 series great for teaching gates and discrete logic systems, so we have a range of 5V I/O units which those systems can work with. And, to benefit both us and the students, we re-use those units. Students produce traffic light controllers using 74-series logic, using a PLD, using a PIC. They control a lift with an FPGA and with a PC/104 system. We're trying to turn out rounded engineers, who understand there are options when confronted with a requirement. Options come with baggage. Later in the course, they learn of the baggage which comes with picking a 5V option. But up to second year, we're happy for them to swim in a uniformly 5V digital environment.

5V has lasted longer than any other. All subsequent standards have been superseded - today's standard will be unusable by the state-of-the-art ICs in three years.

If we'd gone 3.3V, would we not be cursing THAT?

Because we teach a LOT more than just FPGA. Believe me, we look at the voltage issue every year. So far, we've had insufficient cause to decide that we'll throw out and re-cast the 21 exercises per student occupying 32 lab sessions over two years of the course which use 5V circuitry.

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Tim Forcer               tmf@ecs.soton.ac.uk
The University of Southampton, UK
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Reply to
Tim Forcer

"Tim Forcer" wrote

I think this reply clarified the cable issue ?

"Neil Glenn Jacobson" wrote

True, and 5V will still be around for a long time - Motorola, Lattice, Atmel have released 5V IO's on shrink devices. There are signs of 5V becomming an Automotive IO standard, for reasons very similar to Tim's LABs interconnection...

FPGAs are a bit of a special case - they rush ahead on process, in order to get the density and speed up, and some details get left behind.

Still, there are signs of awareness - a Xilinx survey this week asked if '5V IO was important in your design'. :)

PowerMOSETS are another good argument for 5V drive ability....

-jg

Reply to
Jim Granville

Err, not the version embedded in Project Navigator. It scans all the ports (USB, LPT1:n, COM1:n) looking for a compatible cable. This takes quite a while. Then it stops and asks the user to define the cable. Click "Parallel" and "lpt1" and it says there's nothing there.

We think we're not unique in having this problem: .

We did try the various fixes suggested by

- so far without success. What we've gone with for the time being is Webpack iMPACT running stand-alone.

--
Tim Forcer               tmf@ecs.soton.ac.uk
The University of Southampton, UK
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Reply to
Tim Forcer

.

In my experience, Parallel Cable III only works with the port in SPP (old fashioned unidirectional) mode, not EPP or ECP mode.

Karl Olsen

Reply to
Karl Olsen

I suspect your best compromise may be to select the latest and greatest - in Xilinx' case, this is currently Spartan-3

- and have a tiny daughter board built with FPGA, regulator and protection/interface chips.

Of course you would still have to address the issue of updating all the course material, as Jonathan discussed a month or so ago.

And you would have to repeat the exercise every five years or so.

Reply to
Tim

I reckon this is a seriously good idea. It also allows you (for future projects, of course!) to build a base-board with all the human-scale I/O on it - big lights, switches and connectors - using very low-tech, cheap PCB technology, while still tapping in to as exotic an FPGA technology as you wish, at modest cost. Finally, if you are careful about how you partition the programming/download stuff between base-board and FPGA carrier, you could make the base-board compatible with many different types of FPGA/CPLD. This could be pretty powerful stuff for teaching/project tools.

Yes, but you could keep *lots* of commonality this way.

I guess so. But you could hide quite a lot of the change from your "customers" (students, users) by carefully "parameterising" the course materials so that specific devices don't get mentioned too often!

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Reply to
Jonathan Bromley

There are several issues worthy of note:

(1) You may have "old" Xilinx parallel port drivers installed on your system that should be removed. With the release of 5.1i, a new version of the parallel port drivers was included. There is no backward compatibility between iMPACT pre-5.1i and post-5.1i

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(2) You are using a "clone" of Parallel Cable III not the "real deal". We have seen situations in which the clones are not quite clones and fail for a variety of PC-related reasons.

(3) You may need to set your BIOS to use the Bidirectional (rather than ECP or EPP) mode for the parallel port.

.
Reply to
Neil Glenn Jacobson

Hi,

I recently went through the exercise of updating my material from XSE 2.1i to XSE 4.2i. It was a lot of work, I will admit. All of the schematic based projects needed to be converted into Verilog. Plus new hardware (Spartan-IIE). Anyone who is doing the same, or considering doing the same, please feel free to borrow anything that helps you from my class website:

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Thanks, Eric

Tim wrote:

Reply to
Eric Crabill

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Tried that - and some variants. No change.

No difference between clone circuitry and "real deal" hardware.

Hmmm. Haven't tried this, but I'm reluctant to mess around in this way, particularly as other parallel port stuff works OK (eg Lattice ispVM downloader).

The first set of students do their first FPGA exercises today, and we're using the kludge of Webpack iMPACT installation used stand-alone. This works.

For the future, we're looking at Another Company's product. Shame, as we have invested a lot in Xilinx over many years. (That investment of time, effort and money would not have been possible or had any point without substantial support from Xilinx' University Program, which is freely and gratefully acknowledged.)

--
Tim Forcer               tmf@ecs.soton.ac.uk
The University of Southampton, UK
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Reply to
Tim Forcer

Why don't you stick with the last version of the Xilinx tools that really supported the 4000 series (probably 4.2)? All of the improvements in the current tools are aimed at today's FPGAs not at a ten year old family. From the standpoint of your students the only difference between 4.2 and

6.1 is that the GUI is a little different, but you shouldn't care about that because the GUI changes with every release.

The one new tool that would be very helpful for your students is ChipScope, but that uses block RAM which is only present in modern FPGAs.

Reply to
B. Joshua Rosen

This is probably the simplest solution. If I can find the installation CD-ROM!

Means changing the standard installation on 70-odd PCs - so ghosting will be fun (for one of the systems folk, not me).

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Tim Forcer               tmf@ecs.soton.ac.uk
The University of Southampton, UK
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Tim Forcer

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Peter Alfke

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