Xilinx ISE support for dual/quad core CPUs?

Considering how touchy the ISE tools can be and how much tougher PAR can be to parallelize than synthesis, translation and mapping, I am not expecting PAR to parallelize any time soon. While it certainly would be nice, I would be more interested in seeing existing (crash-)bugs and other annoyances get squished than seeing PAR&all crash twice as fast and twice as often.

If you can postpone this purchase for a few more months, I suggest you wait and get a C2D E6850 when they are released: these will be much less expensive (266 USD) yet a bit faster (3GHz with 1333MHz FSB) than the X6800. The CPU economy alone will be sufficient to finance most of the new quad-core system (or replacement quad-core CPU) by the time ISE becomes fully multi-threaded, stable and reasonably scalable beyond two CPUs.

Hi Patrick,

If you're into doing some script-buildning yourself, it is possible to speed up builds by quite alot by hand-coding a build-file for the Synthesis-part, but maybe your problem is the P&R and that is probably another story. I posted something on it here.

If I remember correctly the initial Build time was about 6-7 minutes.

I've mostly done Verilog in ISE but just now I'm attending a VHDL- course at a university and they use Altera's QuartusII tools. They also include Multi-CPU-support and at least it is possible to select how many of your CPU's that will be used from QuartusII. Can anyone comfirm this? Is the SMP-support in Alteras QuartusII better that the non-existant in Xilinx ISE? My project has been so small so I can't measure any difference! :-)

and get a C2D

a bit faster

Thanks for the suggestion, I was not aware of the E6850. Quite a price difference indeed! Unfortunately I can't really wait very long. Too bad that the E6850 is still a few months away...

Yep, I did that already. I have about 10 different modules at the moment, each synthesized with a separate batch file.

here.http://tech.groups.yahoo.com/group/s3_kit/message/123

Yes, the P&R is my problem. It's especially frustrating when all you're doing is changing a few Chipscope signals and you have to go through the whole P&R from scratch.

The E6700 has a lot of headroom, I'm running mine overclocked to 3GHz using the stock Intel cooler and 4G of DDR2 800 RAM slightly underclocked to 750MHz (the RAM speed is set to 667 in the BIOS, the core clock is at

300 instead of 266 which gives you 752). I'm running the system 24/7 doing NC Verilog simulations and Xilinx place and routes. It's been up since Dec without any problems.

On Mar 19, 4:06 pm, "B. Joshua Rosen"

I wish I could buy a system that has overclocking potential. Unfortunately we are mostly limited to Dell machines, which do not provide any overclocking possibilities in the bios. Maybe I can convince the IT guy to buy from another supplier. Do you have any recommendation for a reputable PC builder company which doesn't lock its bioses as much as Dell does (for a reasonnable price)?

Thanks.

I built my system from components I bought from Newegg. I don't know of any reliable online sources for custom machines, I used to use Monarch but they've gone backrupt. Any local white box builder could put the system together for you, that's you best bet for a system that can be overclocked.

The problem with white box builders is warranty... With Dell, you can have a technician on site within 24 hours if there is a problem. With a white box computer, you're pretty much on your own (or rather, in my case, the IT guys are on their own).

There are a few high-end white box builders such as Hypersonic that cater to the gamers, warranty their machines, and have been around for a while. They tend to be rather pricey though.

If you are a little lucky, you might be able to find an overclocking tool that will enable you to tweak your computer's clock generator. My current computer has a P4P800-VM board whose BIOS lacks bus speed adjustments but I downloaded a clock generator control program for my board's IC and I was able to overclock my P4-3.0 up to 3.5GHz - I overclocked only for burn-in and stability testing for about a week, I am back to stock speed for power/noise-saving.

I got the clockgen control utility for my board's chip there:

I've been working on a Virtex4 LX100 design early this year and the main problem was memory usage. I upgraded my Windows XP Box to 4 GBytes (and patched to allow

3 GBytes/process) and even that was not enough!

Above something like 55% Lut/FF usage par 8.2 failed ("out of memory") after 2 hours or more.

I wonder how it should be possible to work with even larger FPGAs!?

bye, Michael

Synplify on a 16GB x86_64 *nix box can probably handle the 4XL330. If you look at the "Why ISE sucks" thread, ISE is a research tool not intended for serious designs... that's pretty much what the XST page on Xilinx's own site says.

Trying to build all the bitfiles for the board below using ISE tools alone would probably be a one-way ticket to the asylum...

there:

Nice, thanks for the tip.

Michael,

9.1i Service Pack 2 has around a 20% memory reduction so you might try that.

For larger FPGAs, we recommend 64bit Linux systems.

Steve

Quartus II 6.1 (and later versions) are parallel programs -- Quartus will use multiple CPUs to speed up a compile if you tell it you have multiple CPUs available. See

(page 8-85) for details on how to tell Quartus how many CPUs you want it to use. In QII 6.1, the speed-up for two processors is typically

10% for fitting and timing analysis, and about 15% for four CPUs. The algorithms we have parallelized have sped up quite well -- about 1.6X to 1.9X speed-up on two processors, but only some of the major algorithms are parallel at this point. We are working to parallelize more algorithms, so expect these numbers to increase in future Quartus releases. The Quartus results (synthesis, fit, timing analysis, and programming file) are identical regardless of how many CPUs are used during the compilation.

Another way Quartus makes use of multiple processors is with the Design Space Explorer (DSE) utility. DSE runs Quartus multiple times with different optimization settings to look for the fastest, smallest, or lowest power (your choice) implementation of your design. If you have multiple CPUs or multiple machines available, DSE can run these Quartus compiles in parallel. See

for details on DSE.

I expect parallel features will become ever more important as multi- core CPUs proliferate. Today dual-core is common. Intel and AMD have made it clear that within a year you'll get a quad-core processor for little price premium over today's dual-core CPUs. And that's unlikely to be the end of it.

Regards,

Vaughn Altera

Hi,

While this will not help you for your Virtex designs, going the Quartus II + Stratix II/III route does offer substantially lower memory requirements. Most designs up to a EP3S200 should compile on

32-bit Windows (