My VHDL project has out grown a XC95108 CPLD, so I'll be using a XC95144 instead. After running the ISE synthesizer and fitter, all of the XC95144's Function Block Inputs are used. Using exhaustive fit mode, 92% of the function block inputs are used. This still doesn't leave much room for additional features. I then told ISE to use a XC95144XL, instead. Only 64% of the function block inputs are used, and
the other resources look good, too. Even though the XL is a 3.3 volt chip, it's 5 volt tolerant, so it should work. The odd thing is that the XL version uses _8 more_ flip flops than the standard version, and the timing report shows that the XL is faster than the std part, even though I selected 10 ns speed grade for both parts. I haven't simulated both chips yet. There's lots of information in the Fitter Report, but I don't know what I should be looking for. I'm a bit overwhelmed. So far, the Xilinx docs haven't helped. TIA,
-Dave Pollum