Xilinx FPGA editor

Check out the "fpga_edline" command. It accepts script files with the "-p " switch.

Example command to lock all macros in a design: fpga_edline -p test.scr test.ncd

Where test.scr is: select macro * setattr Locate LOCK:HARD:0:: save exit

Commands available are documented here:

Does anyone remember hm2nmc?

Cheers, Bret

That's nice thank you.

You're welcome. I should also mention that it's possible to get examples of the command line syntax by monitoring the file design_fpga_editor.out (where design is your NCD design name) while performing the equivalent operations manually in FPGA Editor. There is some buffering going on, so you may have to perform extra operations before the editor dumps the commands you're interested in. You can also get the syntax by recording a script from the tool-->scripts menu.

Bret

What is possible use of FPGA Editor in batch mode !? .. i fail to understand.

-- Varun

Most things that can be done in FPGA Editor can be automated with a script. If you have a repetitive task such as changing the configuration of many IOBs in the same way, then you can do it manually for one IOB, capture the necessary commands involved, and then write a script to do the rest.

I once wrote an interactive perl script to add probes to a design before the editor itself supported that feature.

NeoCAD used this feature ages ago to convert Xilinx hard macros (.hm) to NeoCAD hard macros (.nmc) using EPIC, the predecessor to FPGA Editor.

Bret

Hi Varun,

the most prominent thing that comes to my mind is e.g. adding probes to a freshly inplemented (big) design. Saves you waiting for FPGA Editor to load and process the design-graphics.

Cheers,

Mart> What is possible use of FPGA Editor in batch mode !? .. i fail to