Xilinx EDK OPB bus compatibility

Hi,

I'm new in FPGA design and I have a question about Xilinx EDK. There are different versions of the OPB bus. Some cores use newest versions but others use older versions. So how can I use different cores if they use different versions of the OPB bus?. Can I put one bridge for every version of the bus connected all to the PLB bus.

Thanks in advance,

Jordi

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Jordi
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