I am using the Xilinx EDK to perform simulations of the embedded PowerPC on a V2Pro. I have had success using simply the EDK with Modelsim but when I change the flow to the ISE as an embedded project- I am having trouble getting the boot ROM to be read in as a configuration in Modelsim.
The trouble has to do with assigning the blockRAM configurations to the blockmemories once I wrapped the system_stub in a testbench. I was able to get this all to work with ISE when I did not embed the processor, but once it is embedded- the blockRAM moves a level down in the heirarchy and then the configuration statement does not compile. My understanding in VHDL is it is like this.... (I am improvising from memory here)
configuration name of testbenchname is for behavior -- arch name for uut: system_stub -- unit under test for STRUCUTRE -- arch of system_stub for system_i: system -- declared system for structure for all: blockram_types: use work.blockram_conf; bunch of end fors and end of configuration
I stole this from the system_init file and added my new levels of heirarchy.
It complains to me that system is not a valid component- but in the work directory I see it there clear as day. Is there a limit to how far down in the heirarchy you can assign configurations? I do not believe so. I tried making multiple level configurations and have had no luck either.
If I blow this away- the PowerPC fetches from FFFFFFC and gets zero back. When done properly, it fetches the first opcode and I am off an running.
Thanks, MS