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Xilinx Core Gen Question

Hi all,

Can I insert my own IP core in the Xilinx Core Gen? Can I use Xilinx Core Gen to manage my OWN VHDL IP core? If not, why Xilinx does not allow that feature.

Larry,

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Reply to
Laurent Gauch
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yes you can.

well there are some problems and I guess not all the core gen funtions are accesible to regular non privileged users, but you can create your own coregen cores

Antti

Reply to
Antti Lukats

Hi Antti,

... and how to do that ? I am searching in xilinx doc, but found nothing usable.

Regards, Laurent

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Reply to
Laurent Gauch

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are

we have done that, and the info is available too :)

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Antti

Reply to
Antti Lukats

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