Xilinx 3s8000?

Ron,

I thank you for your gift of such supreme and sublime eloquence and expression.

Austin

I try to adapt my phraseology to match the IQ of my target audience. In the case of Xilinx application engineers I'm forced to constrain my vocabulary to simple words understandable by simple minds.

The involvement is to HELP folks on this board, not (purposely) to promote the products.

Bite the hand.

Once you realized a business wasn't willing to provide you with something worth the price of a car so you could win $30,000.... Folks here were helpful and friendly until you decided to stink up the place.

Next time you buy a car, try to convince GM, Ford, Toyota, or Honda that they should give it to you free or at a substantial discount because you're trying to win a prize, and see how far that gets you.

For that matter, see whether any of the car makers offer an only slightly limited version of one of their cars as a free download.

Sounds like you should use Lattice parts instead of complaining about Xilinx.

My experience has been that Xilinx support people have been helpful and friendly. That doesn't mean that they're always able to give me everything I want for free, though. And I don't curse them (publicly or privately) when they can't.

Eric

In article , Ron wrote: [stuff]

Is this close to what you're looking at doing?

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 [100~Plax]sb16i0A2172656B63616820636420726568746F6E61207473754A[dZ1!=b]salax

John,

We have seen counterfeit devices, and non-functional devices here as RMA's from customers who purchased products from non-approved sources. Since we know by the markings who we shipped them to, the sellers will remove markings, and remark (so they can not be traced). As soon as the number is bogus we know the buyer obtained the parts through a non-approved source, and that ends any support we can offer.

We have seen parts that are not even our FPGAs (just random silicon) remarked and sold. They are likely to burn up your board when you try to power them on.

Cavet Emptor: if you buy through the gray market, do not complain when you get ripped off.

Sometimes folks are lucky and obtain an overstock device that someone could not use. But, since the packaging has absorbed moisture, one has to bake them before use, or the package will pop-corn when assembled (common to all packages nowadays).

Aust> R>

John,

You forgot one other possiblity:

Get a job as a consultant in a large company, contact the local FPGA rep of your choice, and tell them you need samples.

Thanks for the article Tobias. Parts of it look interesting, but no, what they are doing bears little resemblance to what I have done. As I said earlier, my ECM algorithm is coded entirely in Verilog HDL with no connection to an external PC or anything else (nor any embedded microprocessor core). Once it's programmed I turn it on (the number to be factored is hard coded into the FPGA) and wait for it to factor the requisite composite number and invoke a module I'll have to write myself because Xilinx only provides VHDL examples of it's interface) that displays the factor.

Also, another thing that makes my Place and Route problems much greater than the UCL group's is that I am dealing with a bus width of 704 bits rather than the 79 or even 163 bit numbers discussed in the viewgraphs you mentioned. I am very impressed with their timing numbers however.

As I mentioned earlier, the basic design for ECM and a couple of other factoring methods I haven't alluded to but which I've also coded in Verilog, have been completed for several weeks. What I have is purely a packaging problem. I have a little more squeezing I can do on my designs, and I could afford the cost of the development boards if necessary, but I simply cannot justify spending the cost of a decent motorcycle on proprietary design software tools sold at usurious prices by a company whose employees are both condescending and offensive at the same time.

Regards,

Ron

Certainly. On the other hand I generally turn fraud over to the FBI, as it makes little sense to complain to anybody else, like Xilinx. I've purchased gray market parts in volume without a problem for 35 years, including high end Xilinx FPGAs. The last 6 years has been a gold mine in bankrupt NOS sales from the DOT COM bust, plus recycling parts from new never used boards from the same sources. In the VERY few cases I've had problems, it's easily absorbed into the steep discount I get on most gray market parts.

Consider 18 Qty 2K reels of AVX TAJB226K004R for a lot price of $275 including shipping that I picked up last month, which would have cost about $3K through distribution at that Qty, and twice that a reel at a time as I would normally purchase them -- 5-10% on the dollar is worth a little risk. Most of the several hundred reels of parts I have in inventory was purchased for a few pennies on the dollar -- as Gray Market NOS parts at auction over the last 6 years. Ditto for another several hundred trays of specialty ASICs, FPGAs, memory, PLDs and processors.

Ditto for several hundred NOS XC18V04's at a buck a piece, a couple hundred NOS XCV1000E's at $15/ea plus another hundred pulls from the same source at $3/ea. Some high value project boards are not worth the Gray Market risks, but that is our clients choice. While in many cases we can not ship pulls as new product for resale, we can use them to build boards for captive in-house use, spares inventory, prototypes and save the client quite a few dollars.

Consider a few hundred pulls of XC2VP 30/40/50/70's at $35-55/ea, and another few hundred XC2V6000 for a little less is a significant savings for building prototypes, research designs, and spares inventory for devices prices originally in the several hundred to several thousand dollar range. A little risk isn't about getting lucky, it's about buying smart. It allows us to low ball fixed price contracts and pass the savings to our clients by sharing the windfall. It also allows personal research projects that only large corporations could fund using new distribution parts.

And another several thousand pulls of XC4062XLA, XC4085XL, XCV300/600/800/1000/1600/2000/2600 and XC2V parts as well, mostly down in the $1-10/ea for parts smaller than XCV1000's. I seldom pay much more for larger parts, a range that I've used for various projects over the last 6 years. TechStar balls in bulk make reballing reasonably cheap :). SolderQuik preforms for everything else. Bake, flip thru the solder fountain to strip ball slag off, clean/flux and reball in a fixture under A.P.E SMD-1000's. BG432/560 parts are certainly easier than later parts.

Yep ... bake almost everything. Really isn't a problem to kit next days build and put the whole thing in the oven for a day anyway.

For low volume client builds, there are plenty of New Old Stock parts at reasonable prices. And a Lot that people are holding at full retail, waiting for someone that needs to short run an old design to avoid regulatory certification if the design were changed for new parts. For short runs (up to a few hundred boards) you don't need to be lucky, just buy smart.

Have Fun, John

Yeah, but the bean counters consider that theft when you leave out the front door with a few thousand dollars of samples that the Rep ordered for your client. So does the local DA if somebody files charges.

I do projects every year or so that I ask for samples for under my own business name instead, mostly limited to connectors and passives, plus some prototype qty ICs. Mostly I just purchase Gray Market NOS stock in volume for pennies on the dollar, and design around it for short run builds. I prefer fixed price, or flat fee, contracts ... so it's easier to quote or bid based on my inventory rather than dealing with distribution pricing and availalbity uncertainty.

When I need samples for a client build, it's seldom difficult to get them in the name of even a smaller client when I have a contract and PO for finished product and a build schedule. Having two SMT lines in my shop generally breaks the ice with a rep ... most students and hobbiests don't have the capacity to build 5,000 boards per month. The

10 zone N2 capable BTU and Vitronics 24" wide by 20 Ft long ovens along with the several Dynapert MPS318 and MPS500 pick and place machines pretty much solve that question with a quick tour of my facility.

Designs with 0805 and larger parts I do in-house, everything else goes out to a CM. As you might guess, I design mostly with 0805 and larger parts for short runs and prototypes. If the run is too big for us, I don't worry about it and mostly use 0603 passives, or smaller if the client want's the density and is comfortable with the cost.

I think you are entirely misguided in contemplating using ECM to factor 'hard' numbers such as the RSA Challenge ones; the expected number of operations would be so large that the calculation would take literally millions of years. There is a community (Dan Bernstein probably the mainstay of it) interested in factorisation using hardware, and the SHARCS conferences contain the people you'd want to talk to, but a straight ECM implementation hard-wired to factor a single number is not all that useful. If only because the pricing of larger FPGAs is not really competitive with the billion 64x64->128 multiplies a second that a $400 dual-core Opteron processor offers.

Tom

You may very well be right Tom, but I am alas caught betwix the proverbial rock and hard place. There isn't even the most remote possibility that sieving would fit into the largest FPGA available today, so I am forced to go with the "next best" algorithm which is ECM. Keep in mind that there are a great many opportunities in ECM for parallelization and pipelining. As I mentioned in my original message, the record for ECM factoring the last I heard was 66 decimal digits. It may very well be that I am only able to extend the record by a couple of digits, but at least I will have done something to be proud of and learned a lot about FPGA programming in Verilog HDL. It sure beats sitting around and rotting my brain in front of the boob tube or playing chess on the Internet all day long (Playchess.com is great by the way). It takes me a long time to do a design because of health issues, but at least now I have all the time I need without worrying about schedules and budgets.

In a way, I was sort of gambling that Moore's Law brings large and affordable FPGA's to market faster than the price of conventional computers drop. My plan was to be ready with a fully tested and functional ECM design whenever I was able to afford an FPGA large enough to fit my design. That time is now here, but I hadn't counted on the exorbitant prices of the software necessary to use most vendor's devices. I suppose I'll check on the synthesis capabilities of the free Icarus Verilog package that I use for simulation and see if there are any open source packages I might use to bypass Xilinx's outrageous prices for development tools.

There is a community (Dan Bernstein

Even as proof-of-concept? Do you know of anyone else who has ever created an entire ECM factorization design in Verilog? :-) In any case, I think it makes a great hobby (except for the cost of course).

If only because the pricing of

One nanosecond per 64 bit multiply Tom? That seems a bit of a stretch but I won't quibble over details. So to multiply two 704 bit numbers together (depending upon how it's implemented of course) would require roughly sixty 64-bit multiplies and a bunch of adds. Even so, sixty nanoseconds per 704 bit multiply is pretty impressive. The problem with doing conventional multiplies in ECM is that you have to do a modulo operation after almost every multiply, and modulo is at least as costly in terms of both gate count and time consumption as a multiply; whereas I was able to eliminate a all explicit modulo operations altogether by combining it with my multiplication module. :-)

Because of all the variables and simulation time constraints, it's impossible to get an average value for each ECM iteration for "real" data without being able to run a few test cases in real time on a real FPGA. As soon as I get that done I'll be happy to post the results (for better or worse).

Regards,

Ron

My apologies if my sarcasm wasn't perceived from my post. I am unequivocally not condoning that type of activity.

It sounds like you can have much fun with the two SM lines you own.

Take care, rob

John,

You know the ropes, and probably have a set of trusted sources.

I am happy that you have been successful. But you must understand that we can not support components purchased through non-authorized channels.

Aust> Aust>

That's great, certainly helps drive the prices down on Gray market parts, which means your customers eats their shirt when they need to resell excess inventory. :)

(with some gleeful sarcasm and self interest)

With respect to connecting multiple boards, the XUPV2P "Using High Speed Serial MGTs with the Aurora IP" Quickstart provides a good infrastructure so the developer can focus on the partition itself.

Paul

c d saunter wrote:

If I remember right, 704 is 11 times 64, so the multiplication would take 121 of those 64-bit multipliers, not "roughly sixty"...

I am glad we got away from the obscenities, and now deal with basic math... Peter Alfke

My comment was to Thomas Womack, not to you dimwit. If you had half a brain you would realize that it's not necessary to do 121 multiplies because the upper and lower halves of the multiplication matrix above and beneath the diagonal are symmetric. Please do not respond to comments (it wasn't a question, BTW) that you don't understand.

And you obviously need to take some remedial math courses Peter. I have plenty more of what you call "obscenities" for you Xilinx scumbags who use this forum to spread FUD and peddle your overpriced goods. Admittedly I made the mistake of asking for a hobbyist discount on your obscenely priced software design tools when I started this thread, but now that I know what despicable cretins you are, I would appreciate it if in the future you and the other Xilinx creeps would KEEP OUT of the Usenet discussion threads I initiate.

Thank you,

Ron