Word sync in Cypress FX2 fifos /w 8 bit bus

Any Cypress FX2 (USB) gurus out there?

I have one of these devices on an FPGA board (Digilent Nexys), which only provides an 8-bit external datapath instead of 16 bits. I'd like to stream substantially wider words (32, maybe 48 bit) to a PC application.

Could anyone provide some clarity on what mechansims exist to synchronize the byte-wide data to application word boundries? Is there something I can do to insure that each USB packet begins on a word boundary?

The boundry locations are readily available to the FPGA code, the question is how to communicate that information to the USB engine - is there a way to force creation of a new packet?

Obviously in-band signalling for data framing remains an option, but I would very much like to avoid resorting to that.

Thanks for any ideas - I haven't given up on figuring this out from the data sheets & manuals, but given their length it's not going quickly.

Reply to
cs_posting
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We've used the FX2 on multiple projects with FPGAs.

The FX2 delivers a stream of data bytes to the host, from the hosts perspective, it hasn't a clue if the external FX2 bus is

8 or 16 bits. As long as the transfer lengths are an even number of bytes and your FPGA code properly converts your internal 16/32/48 bit data into a byte stream, you should have no problems.

Yes, you can also force the start of a new packet using the PKTEND pin, but your USB bandwidth may suffer since you will be sending short packets.

John Providenza

Reply to
johnp

In general I'd agree - but my fear is that if synchronization was lost for any reason, there'd be no way to get it back. And maybe not even any way to know, other than the data not making any sense.

Thanks - that's more what I was looking for. I wouldn't do it every word, but more like every packet or several packets. I wonder if there is any problem with asserting this at every point where the packet would automatically end anyway... will have to get it set up and see.

Reply to
cs_posting

Cypress has some notes on using PKTEND. I don't recall all the details, but I believe you need to be careful not to assert it if the fifo_full flag for the fifo is active.

John Providenza

Reply to
johnp

Your opinion - as those of many who came before you - is noted. Too often when a thread is active, it makes more sense and is more readable to top-post. Most often bottom posting is preferred. We occasional top posters are sorry for the inconvenience posed to occasional users of this forum.

Reply to
John_H

cs snipped-for-privacy@hotmail.com wrote: : On Apr 9, 12:54 pm, "johnp" wrote: : > We've used the FX2 on multiple projects with FPGAs. : >

: > The FX2 delivers a stream of data bytes to the host, from the : > hosts perspective, it hasn't a clue if the external FX2 bus is : > 8 or 16 bits. As long as the transfer lengths are an even : > number of bytes and your FPGA code properly converts your : > internal 16/32/48 bit data into a byte stream, you should : > have no problems.

: In general I'd agree - but my fear is that if synchronization was lost : for any reason, there'd be no way to get it back. And maybe not even : any way to know, other than the data not making any sense.

Are you using the Digilent firmware on the device or your own? I've not used their firmware so I can't comment on that.

If you are using your own firmware then there are a couple of options open:

  1. Explicitly use one of the CTL signals from the FX2 GPIF (internal fifo control) to act as an upper/lower byte select. This would guarantee that all words are correctly preserved. There is an example of this in the 'EZ-USB FX2 GPIF Primer' pdf from Cypress.

  1. Most of the FX2 devices' Port A pins are availible as IO from the FX2 firmware and as user IO from the FPGA. You could pulse one of these occasionaly from the FX2 firmware to check/force proper alignment within the FPGA. Digilent must have connect them up for a reason so perhaps one of them would suffice for this under their firmware?

cheers cds

(who is glad Digilent connect up ifclk on this board, unlike their old USB2 module...)

Reply to
c d saunter

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