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WinCUPL state machine for 16V8

I guess the combination of Wincupl and a 16V8 will be pretty much steam technology for most of you but it is a real mystery to me.

I blew up some 16V8 stepper sequencers the other day and I have to program up some replacements. All I have is some software to program the ATF16V8B chips and wincupl.

This is my first try at this game but I have the state machine working after many hours of searching and puzzling and it behaves the same as the original chips. BUT...

The driver board has an enable input which should turn off the motors. In the current design, that is done by setting the outputs all high when ENABLE is active. unfortunately, this only happens if a clock pulse is applied as (I suppose) it has to get clocked through the output registers.

Is there a way to make the ENABLE input force the outputs to a predetermined state with or without a clock pulse?

I would also be grateful for any other assistance you could give.

Here is the CUPL file as it stands:

Name JSMOTOR ; PartNo 00 ; Date 13/07/2004 ; Revision 01 ; Designer Engineer ; Company Helicron ; Assembly None ; Location ; Device g16v8a ;

/** Inputs **/ Pin 1 = clk ; Pin 2 = DIR; Pin 3 = ENA ; Pin 9 = FULL; pin 11 = !OE; /** Outputs **/ Pin [12..15] = [Q3..0]; /** **/

field stpctrl = [Q3..0]; $Define S0 'b'0000 $Define S1 'b'1000 $Define S2 'b'1010 $Define S3 'b'0010 $Define S4 'b'0110 $Define S5 'b'0100 $Define S6 'b'0101 $Define S7 'b'0001 $Define S8 'b'1001 $Define S9 'b'1111

field mode = [ENA,FULL,DIR]; up = mode:7; hup = mode:5; down = mode:6; hdown = mode:4; clear = mode:[0,1,2,3];

Sequence stpctrl {

present S9 if up next S2; if down next S2; if hup next S1; if hdown next S1; present S0 if up next S2; if down next S2; if hup next S1; if hdown next S1; present S1 if up next S2; if down next S8; if hup next S2; if hdown next S8; present S2 if up next S4; if down next S8; if hup next S3; if hdown next S1; present S3 if up next S4; if down next S2; if hup next S4; if hdown next S2; present S4 if up next S6; if down next S2; if hup next S5; if hdown next S3; present S5 if up next S6; if down next S4; if hup next S6; if hdown next S4; present S6 if up next S8; if down next S4; if hup next S7; if hdown next S5; present S7 if up next S8; if down next S6; if hup next S8; if hdown next S6; present S8 if up next S2; if down next S6; if hup next S1; if hdown next S7; }

Pete Harrison

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Reply to
Pete Harrison
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Use it as a tri-state enable? Needs external pull ups or downs.

-- The suespammers.org mail server is located in California. So are all my other mailboxes. Please do not send unsolicited bulk e-mail or unsolicited commercial e-mail to my suespammers.org address or any of my other addresses. These are my opinions, not necessarily my employer's. I hate spam.

Reply to
Hal Murray

On the other hand, a 16V8 or 22V10 is often the perfect size.

You have your registers on four of the output pins. Route those values combinatorially to the remaining four outputs so that, for example, (if ENA reset is "motors off"; flip to !ENA if not so).

pin [16..19] = Y[3..0]; ... Y0 = ENA & Q0; Y1 = ENA & Q1; Y2 = ENA & Q2; Y3 = ENA & Q3;

(Is there a shorthand notation for that? My CUPL is a bit rusty.)

If you're already wired to come off of 12..15, move the registered outputs up a nibble, of course.

A disadvantage (or maybe an advantage) is that the registers don't change value if only ENA changes, so going back to the active state will restore the stepper bits to where they were (if no clk changes...).

--
Rich Webb   Norfolk, VA
Reply to
Rich Webb

Indeed. I am sometimes frusrated by people expounding the virtues of this or that CPLD etc when you can only get them in SMT multipin packages. Not much good if you just want an address decoder.

This is an excellent advantage in this case as it may make it more likely that the steppers will start up again without a large jump to a new detent.

I have just tried this and it works a treat. Luckily, the other outputs are all free in this circuit.

I also tried the shortcut:

Pin [12..15] = [Q3..0]; /** **/ Pin [16..19] = [Y3..0];

field output = [Q3..0]; field stpctrl = [Y3..0];

/* state machine stuff */

output = ENA & stpctrl;

Which works just fine

Thank you so much. I have no idea where you are so you will have to make do with a couple of virtual beers (or whatever you prefer)

Pete

Reply to
Pete Harrison

You could do it using the OE pin on pin 11, and use external pullup/pulldowns. If you have enough free output pins, you could also route the state machine outputs back through another 4 cells to provide an asynchronous enable function. Or you could pass the clock through a cell before feeding into pin 1, so you could generate a forced clock pulse when enable gets asserted.

Reply to
Mike Harrison

Ding ding ding. Can you say "runt pulse"?

-- The suespammers.org mail server is located in California. So are all my other mailboxes. Please do not send unsolicited bulk e-mail or unsolicited commercial e-mail to my suespammers.org address or any of my other addresses. These are my opinions, not necessarily my employer's. I hate spam.

Reply to
Hal Murray

Depends on when you are likely to be using the enable - in most cases it will probably not be a problem, as either the enable will be well seperated from movement signals, and if you are disabling, you probably don't care. Additional terms could be added to the state machine to reduce the risk of false counting if this is an issue.

Reply to
Mike Harrison
[snip...snip...]

Ah! I'd forgotten fields; knew there had to be *some* way to avoid having to list them explicitly.

Beer is fine; thanks! I'm in the midst of a week of grunting through some reliability paperwork (FMECA, ugh) so a small potation is welcome.

--
Rich Webb   Norfolk, VA
Reply to
Rich Webb

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