Which FPGA and memory to use? The eternal X vs. A question.

I need to build a sort of a simple video processor to drive a TFT LCD screen in an embedded system. The plan is to use a small and cheap FPGA with some memory. Low cost is very important, so fast SRAM is not an option.

I want to test the concept on an off-the-shelf board before making my own, so I got the Spartan 3E "starter kit" that comes with DDR SDRAM. Unfortunately I can't make the memory work using the core generator. Most likely I'm not doing something right, but maybe there is some problem with the hardware.

While searching for info on SDRAM interfacing I got an impression that the DDR SDRAM is very difficult to use and the board layout is very critical. For my application 133 MHZ DDR is a heck of an overkill as I only need to read 16 bits of consecutive data at 50 MHz (burst) max.

So regular SDRAM is probably a better choice. I'm also using Micron SDRAM elsewhere on my device (with the PXA255 CPU).

Looking for a board with built in SDRAM I came across the $150 Altera DE1. Traditionally I used X more than A, but those were CPLDs rather than FPGAs. The data sheet looks promising. Only 2 power voltages. Same cost (Cyclone 2 vs. Spartan 3e).

There is also PSRAM as an option and a Digilent board with S3e and PSRAM, but it is more expensive than plain SDRAM by far.

My volume is about 10,000 a year. I figure about $5 for FPGA and $1.5 for SDRAM (8 MB). PSRAM is more like $5.

Am I missing something? I'd like to hear opinions before making the next move.

Thanks.

-Alex.

Reply to
Alex Freed
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Howdy Alex,

First the eval board: yes, it is most likely not a problem with your board. If you are counting pennies on your BOM and need a decent amount of RAM, SDRAM (or DDR - its cheaper this week) is the only way to go, so you need to take the time to debug the one you have.

Now, vendors: if your product is really that cost sensitive, get 5k or

10k piece prices from all of the vendors. Include Lattice and others in the mix as well. Whomever has the most responsive sales and support organization, combined with the lowest price, wins your business. The companies will try to turn you against the others, and turn it into a religious argument - but it doesn't sound like you are doing anything that requires pushing any envelopes, so multiple parts from multiple vendors will do. All you need is a good idea of which device size in each family is required so that you can do valid price comparisons. Use the free tools from each company (or request an eval copy) for that if you need.

Good luck!

Marc

Reply to
Marc Randolph

One other thing: if you're using an FPGA that doesn't have built in configuration memory (I think each vendor may have one line that does), don't forget to include that in your preliminary BOM.

Marc

Reply to
Marc Randolph

Regarding the "X vs. A" discussion, I encourage you to price out options from all competitors, and see what's right. For instance, Actel's Fusion line of flash-based FPGAs includes a built-in oscillator, D/A and A/D converter, temperature monitor, NVRAM, etc..... You might find that it suits your overall (low-cost, low- power) requirements.

K.

Reply to
Kris Vorwerk

Most DDR wil operate down to 81 MHz. At 81MHz it is not so difficult to get DDR working. Just stay away from the MIG tools for simple down to earth solutions.

You can probably design a controller which does both SDRAM and DDR. The control signals are very similar. The only difference is that DDR outputs data on both edges.

One thing to watch out for is that (AFAIK) Altera has no memory in their slices. In Xilinx FPGAs it is possible to use the lookup table as a 1x16 bit memory. This can prove very usefull for creating small memories (like dual buffers, fifos, etc). In Altera devices you'll need to use flipflops. A 32x16 memory uses 16 slices in a Xilinx device and probably at least 256 or 512 slices (some extra slices are needed for the memory decoder and data muxes) in an Altera device.

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Reply to
Nico Coesel

Hi Alex and Nico,

The Stratix III devces allow individual LABS to be configured as small grain distributed memory. More details can be found at:

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The Stratix III devices have the additional advantage of being the most power efficient devices in their class today.

Hope this helps, Subroto Datta Altera Corp.

Reply to
Subroto Datta

Brand A has M4K (4K bits) and M512 (512 bits) available depending on which device you're targetting. That's just the basic memory primitive, if you need more Quartus will assemble the proper number of these primitives, you won't be constructing look up tables from logic and flops if your code is written per the usual template for synthesizable memory devices. Different but roughly equivalent to brand X.

KJ

Reply to
KJ

Not at all. The way Xilinx's devices work is much more flexible and consumes less routing resources because the memory can be mixed/combined with logic. If you need to bring signals to and from a memory block, you'll need more routing resources and require the logic to be concentrated close to the memory. Both resulting in more delays, lower speed and hot spots on the die.

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Reply to
Nico Coesel

Why not choose a CPU with build-in LCD controller? For instance, the LCD controller in the Blackfin from Analog Devices should -according to the maximum pixel clock- be able to do 1280x1024 @ 50Hz. You can buy 2 Blackfins for the price of one FPGA and get the design ready much faster.

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Reply to
Nico Coesel

Thanks for comments, Marc

OK, I didn't doubt much that SDRAM was the way to go, but I got an impression that DDR is way more difficult to work with and I don't need the bandwidth. So probably the regular SDR is it. Especially considering I already have it in my BOM.

Probably not. I'm well used to X tools, somewhat used to A tools and unless there is a huge potential win would rather not learn yet another toolset.

As I said I was using the tools for a long time. It's just the SDRAM that I have zero experience with.

Well, modern FPGAs from both X and A work with dirt cheap commodity serial flash. However I have a hard CPU with 32 MB of flash, so I can configure FPGAs for free. More flexible too.

-Alex.

Reply to
Alex Freed

This is nice to know, but probably not relevant to my design that calls for rock bottom priced silicon.

-Alex.

Reply to
Alex Freed

I have a build-in LCD controller in the PXA255. It just does not have the performance needed. So I want to preserve most software of the existing system and add better graphics.

It's worth looking into, but a quick look-up only showed ucLinux ported. Does it mean there is no MMU?

-Alex.

Reply to
Alex Freed

Yes, the MMU in the Blackfin is really only a simple memory protection unit. That is why it only runs uClinux.

Reply to
rickman

Howdy Alex,

If you're truly concerned about low cost, why wouldn't it be worth an extra week or so of getting your design through a different tool set (or even several) if it dropped the price a dollar or more per unit?

Regards,

Marc

Reply to
Marc Randolph

I can imagine. But I think getting the FPGA together will take as much time as migrating the software to a new SoC. If the PXA255 is 'an older device' you may even save money on the SoC itself and get better overall performance.

Yes. But from what I've read this doesn't make much difference in the way Linux looks & feels.

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Reply to
Nico Coesel

I would definitely consider learning new tool if I *knew* that would save at least a buck per unit. I'm reluctant to go for a fishing expedition.

Thanks anyway for the suggestion, Marc.

-Alex.

Reply to
Alex Freed

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