Which Altera to buy?

Thank you, Hans.

Best regards, Rick C. Hodgin

Reply to
Rick C. Hodgin
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One issue to note on the ENC28J60 is that it does not do autonegotiation.. Thus if

you want/need full duplex you need to manually set the speed and duplex on the

receiving port or you will get duplex mismatch and difficult to debug problems. You

can not manually set the ports on most cheap network switches and they will (as

the standard requires) usually default to 10 half duplex. This is pointed out in the ENC28J60 data sheet but the implications to duplex mismatch may not be obvious to a non network person. Using one to connect to a PC isn't a problem as you can manually set the speed and duplex on the PC port to match that of the ENC28J60 and run 100 full duplex (modulo spi speed of course, I think max spi speed is 25 megabits or so on the

ENC28J60) on both ends. None the less a very cheap simple ethernet solution if you

pay attention to its limitations.

Peter Van Epp

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vanepp

The board has arrived! The board has arrived! Shout from the roofs, "The board has arrived!"

:-)

Best regards, Rick C. Hodgin

Reply to
Rick C. Hodgin

Perhaps Terry Davis would be interested in your project.

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Reply to
sbattazzo

He's been suggested before at various times.

The Temple OS guy records responses he says came from God when asked. His skills are most adequate, but his general relationship with God is keeping me at a distance.

Best regards, Rick C. Hodgin

Reply to
Rick C. Hodgin

This is where I'm at right now.

Am I able to do everything I need from Linux? Or do I need to setup a Windows partition?

I tried to run the Control Panel software which came with the board in WINE. It launched, but said I needed to have Quartus installed for it to work properly. I don't particularly want to install Quartus for Windows in WINE as it's pretty hefty. :-)

Quartus for Linux is working just fine, as is Qsys in Linux.

The "NIOS-II bare-metal software world" you mention ... what is it? And why Eclipse? Can I use Netbeans? :-)

And how does the C compiler enter into it? And what is the BSP for the FPGA hardware? I was able to install my board in Quartus in Linux, and Qsys was able to prepare for it.

I've found a few Altera videos on getting started, but the host goes through several settings too quickly and does not go into details as to why he's chosen what he's chosen.

Would anyone be available to get on chat with me some evening or weekend and help get me kickstarted?

Thank you in advance.

Best regards, Rick C. Hodgin

Reply to
Rick C. Hodgin

Basically here are my goals:

(1) Altera examples (get them working correctly, learn the toolset). (2) Create or find a simple CPU and get it working correctly. (3) Using that simple CPU, add hardware support for my Ethernet board, and (4) (on the host) write software to read data from the Ethernet packets.

And finally: (5) Begin working on my LibSF 386-x40 CPU in Oppie-1 through Oppie-6 stages.

Best regards, Rick C. Hodgin

Reply to
Rick C. Hodgin

Linux is fine. In fact, Linux is better than Windows in some ways.

The System Builder software just generates some template Verilog files that can go into Quartus. I usually run it in WINE when it's necessary. Generally you just use that software to make a template once, and then everything happens in Quartus so you can forget about the System Builder. The Control Panel is just 'click a Windows button, and oh look the LED lights' kind of thing - handy for checking the board you bought works, but not that useful beyond your first 5 minutes.

NIOS-II Eclispe is a (very old) version of Eclipse with some of the NIOS tools integrated. That means there's menu options for making sample projects, regenerating drivers, etc. It quite handy as a means of learning what the tools do. Now I understand how it works I generally drive all of that from Makefiles because there's less IDE magic in between me and the build process. So I'd suggest using Eclipse just to get familiar with the tools then you can do what you want after.

A lot of the software-land tools assume you're going to put a NIOS-II processor on your FPGA:

Qsys (the network-on-chip builder) -> BSP builder (generates a pile of C code drivers for the Altera IP on your FPGA) -> NIOS II C compiler -> download ELF to FPGA -> terminal to monitor your software

If you're just doing FPGA-hard-stuff you don't have any software and you can ignore this. If you don't have a NIOS the BSP, C and ELF steps are irrelevant, however it's worth understanding the tool flow... the best revolutionary understands the system before they undermine it ;)

The NIOS environment is also handy as a reasonably lightweight processor to have on hand when you want to do things that are easy in software and a pain in hardware (like 'printf'). This comes up surprisingly often - it's just another tool in the box.

I'd start with the demos that come with your board: test them, then see if you can rebuild them and they still work, then extend them. In the FPGA world there are so many finicky details that, if you get them wrong, will stop your project working - so it's worth starting with an existing working project and building on that.

Theo

Reply to
Theo Markettos

On that one, I'd strongly suggest a preliminary:

Write or otherwise obtain a testsuite. This has been absolutely critical to getting our CPU off the ground and keeping it there. When you have a testsuite, run it against each commit of your CPU code.

Particularly when you get to more complex situations (MMU, interrupts, exceptions, concurrency, booting a real OS), the testsuite becomes invaluable to stamping out bugs in your design.

Theo

Reply to
Theo Markettos

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