Hello,
We'll have to design a new board which will have a PCIe interface. There will be a xilinx FPGA V2P or V4 because of PPC use, MGT needs and DDR interface.
I read that FPGA SERDES were not fully compliant with PCIe. Can someone tell me on which points ?
So if the solution is to have an external PHY, what would be the part that would be not too expensive and easily available ??
Thanks for your advises.
Stéphane.
"sjulhes" schrieb im Newsbeitrag news:43ba2de0$0$7180$ snipped-for-privacy@news.free.fr...
Hi Stephane,
some advice/hint
1) V4 RocketIO (eg MGT) have BETTER(does not mean FULL!) PCIe compliance then the V2Pro MGT 2) before doing any V4 MGT design, check that you can actually get V4 MGT production silicon in time for your project, if not then use V2Pro 3) there are 3 PCIe PHYs known to be somewhat available, Philips (Datasheet under NDA), TI (no info on TI web!!), Genesys - buy now button on hitechglobal but it only leads to 'call' not to online ordering, datasheet status unknown ---- NO PCIe is easily available 4) PLXtech PEX8111 1-lane to PCIe to PCI this possible the easiest solution, silicon available from online store 5) PLXtech PEX831 PCIe to local bus bridge, datasheet under NDA, also package is way larger than PEX8111 (I assume its multi-die BGA!)if you need MGT, PPC and relativly short time to market then my choice would be: V2Pro + PEX8111
Antti
Thank you for your answers.
Well it seems that unless you are ATI or Nvidia having a PCIe board running is not that easy !
But I guess the first thing to check is what are these compliance differences on V4, to see if they are acceptable for this design. Can someone tell me where I can find information on this ?
Thanks.
Stéphane.
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that
(Datasheet
solution,
would
"sjulhes" schrieb im Newsbeitrag news:43ba3f51$0$7178$ snipped-for-privacy@news.free.fr...
both V2Pro and V4 can be and have been used for working PCIe solution V2Pro requires external clock recovery V4 possible not any more there are other minor issues that are not a show stopper for MGT based PCIe design
V4 MGT claim to have fixed most (all ?) missing PCIe compliance issues there are some docs about that on the xilinx web if you search really closely
but for V4 MGT-PCIe first thing todo is CHECK production V4MGT availability !! after that it makes sense to check the tech specification , also consider the cost (both onetime license and FPGA % cost) for FPGA PCIe IP-Core
-- Antti Lukats http://www.xilant.com
We are going away from using Xilinx MGT's for the PCIe function in our product lines. V2Pro worked, sort-of. We are running very hard away from V4 (FX) for OBVIOUS reasons and I would avoid the V4 FX family MGT's at all costs for the moment.
I recommend the Genesys Logic Phys. Use the GL9711 for
1-lane and the GL9714 for 4-lane. You can combine two of the 9714's to get 8-lanes, but you have a bandwidth mess between the FPGA and the PCIE Phy.ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.