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Weird XPower results for FSMs and different FPGAs

Hello,

I'm currently comparing different state encodings (e.g. One-Hot, Gray, Binary) on their power consumption. The state-machine itself is synthesized and mapped with the Xilinx WebPack tools. Then I simulate it with a input sequence and finally check the power the state-machine used with XPower. The state-machine is the only code placed on the chip and simulated.

Now I face the following problem. If I do the steps described above for a Spartan 2 I get results that show a difference of some percents which seem to be realistic. If I do the steps above for a Virtex 2 I get the _identical_ power consumption for all different types of encoding.

I expected that both chips would behave in the same manner. Has anybody of you an idea what my failure is, where the problem is or why the Virtex 2 power consumption is constant? I'm using the most recent version of the Web-Pack and have applied the service pack 2.

Thanks in advance Patrick

Reply to
Patrick Kulle
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Maybe the difference in power due to state encoding is less than the uncertainty in the XPower measurement. I expect that zero is closer to the right answer than a few percent.

-- Mike Treseler

Reply to
Mike Treseler

I agree. For example if you implement a counter, the binary encoding and the one hot encoding toggle two bits per cycle on avarage, whereas the gray encoding toggles one bit per cycle. This means that in this case independently of the size of the counter the implementations differ only in one toggling flip-flop per cycle.

For more irregular state machines of course the difference is larger, but I expect it still to be pretty small compared to the clock tree power.

Kolja Sulimma

Reply to
Kolja Sulimma

Hello Mike, Hello Kolja,

thank you for your posts.

Before I had a look at the power consumption using XPower I simulated the FSM absolutely technology independent and only observed the switching activity. The difference between the best and the worst encoding is up to 40 percent of the switching activity.

The results for the Spartan 2 match with the results I got when I only observed the switching activity of the state-bits. Even if they are not so good.

The results for the Virtex 2 are equal for each encoding, there is not even a difference between two encodings of more than 1 mW. If I try the same experiment using a CoolRunner 2 I get different results for different encodings again.

I'm just wondering If there is anything else that could cause this behavior of the results?

Thanks Patrick

PS: Currently I'm not trying to optimise a specific circuit to a specific target but trying to check where power can be saved.

Reply to
Patrick Kulle

Patrick Kulle wrote: >Before I had a look at the power consumption using XPower I simulated >the FSM absolutely technology independent and only observed the >switching activity. The difference between the best and the worst >encoding is up to 40 percent of the switching activity.

In the example that I gave there even is a 100% increase in switching activity (2 DFF as oposed to 1 DFF) but I am sure you can not see the difference in power consumption.

Virtex-II has smaller device geometries than the Spartan-2, so the switching power will be lower. Running XPower gives the following results per event: DFF - 353fJ SR16 - 4853fJ RAMLut - 653fJ LUT+carry - 2756fJ If you have a LUT and a DFF per state bit you need about 300M bit transitions per second so see 1mW in power supply difference. How large is you state machine and how fast do you clock it?

Kolja Sulimma

Reply to
Kolja Sulimma

Hellp Kolja,

thanks for your post, now it gets clearer for me. Could you please tell me, where I can find the results per event you gave above?

Thanks in advance Patrick

Reply to
Patrick Kulle

I went to the WebPower Site and entered a row for 10000 DFF at 100 MHz with 100% toggle rate and multiplied the result by 1ps. I build similar row for the other parameters.

Kolja Sulimma

Reply to
Kolja Sulimma

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