hi i 'm designing a board with fpga spartan 3(Industrial series) . while testing the board, specially when there is spike on any input pin of fpga, fpga enters unknown sate and won't do its job correctly, but after reset it continues working. is it a common design practice to have an external watchdog timer to reset the fpga in fpga based boards in case it is in unknown state, like watchdog timer in microcontrollers? I thought that fpgas are more stable than microcontroller in response to noise, but in my test design I experienced the same thing similar to microcontrollers.
are gates in fpga altered due to noise?? tnx in advanced for any comment
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