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VirtexII-Pro: Why is ICAP slower than SelectMAP?

Hi all,

xapp660 states that the maximum frequency for the ICAP (internal version of the SelectMAP-interface) is 35MHz. Yet the maximum frequency for SelectMAP is supposed to be 50MHz. How come there's a difference there if the whole point of ICAP is to give you access to the regular SelectMAP-port with all its capabilities from within the FPGA? Isn't ICAP supposed to be just a way to access the exact same logic that is connected to the outside via a set of pins? So the why does it make a difference if I access the same configuration logic via pins from outside the FPGA or via nets from within?

--
Sean Durkin
Fraunhofer Institute for Integrated Circuits (IIS)
Am Wolfsmantel 33, 91058 Erlangen, Germany

mailto:23@iis.42.de
([23 , 42]  [durkinsn , fraunhofer])
Reply to
Sean Durkin
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Sean,

It has to do with what we are able to test, and thus what we are able to specify.

The ICAP should be just as fast, but not being able to verify that easily makes it something that gets specified in a safe region where 100% of the parts are guaranteed to operate.

Aust> Hi all,

Reply to
Austin Lesea

Thanks for the info, Austin.

It seems to me that the 35MHz is indeed all ICAP can handle. At least I've tried 33MHz and 38Mhz, and it works fine with the first but doesn't with the latter, so 35MHz seems reasonable.

Whereas the strange thing is that it even works at 50MHz, but only for a while.

I posted awhile back that I had trouble performing a readback of the CLB configuration data via ICAP. Now I know it's because I used a CCLK out of spec (I was using 50MHz back then), but the strange thing is that it worked fine for about 370000 bytes, stopping exactly at the same point each and every time I tried, so problems with the clock weren't the first thing I looked into.

Seems like there's some error accumulating there that sums up to a S/H-time violation or something after a give time...

--
Sean Durkin
Fraunhofer Institute for Integrated Circuits (IIS)
Am Wolfsmantel 33, 91058 Erlangen, Germany

mailto:23@iis.42.de
([23 , 42]  [durkinsn , fraunhofer])
Reply to
Sean Durkin

So if you send the internal signals that currently connect to the ICAP off-chip and back to the SelectMAP pins instead, you can get a speed boost? Pierre-Olivier -- to contact me directly, remove the obvious from my email address --

Reply to
PO Laprise

That might work, if you have that many I/O-pins to spare in your design... But still it's sort of an "ugly" solution. :)

--
Sean Durkin
Fraunhofer Institute for Integrated Circuits (IIS)
Am Wolfsmantel 33, 91058 Erlangen, Germany

mailto:23@iis.42.de
([23 , 42]  [durkinsn , fraunhofer])
Reply to
Sean Durkin

I agree that it's ugly, but what I find mind-boggling is that you can get any sort of speed-up by going off-chip!   Also, I seem to recall (plz correct me if I'm wrong) that SelectMAP allows for a form of "handshaking" using the "busy" signal, which allows you to work SlaveSelectMAP at a slightly higher frequency (see Virtex-II Users guide

-> Configuration -> Slave SelectMAP Programming Mode -> CCLK -> (...). Does this also work with the ICAP? What is the maximum clock frequency then? Pierre-Olivier -- to contact me directly, remove the obvious from my email address --

Reply to
PO Laprise

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