Hello,
I came accross what I think is a bug in virtex4 debug bitstream generation. In this mode, the two pad frames (82 bytes) which are needed at the end of each row configuration are written *after* the LOUT write of the FAR, while they are expected to take place in the previous FDRI write.
I don't know if this really is a bug or some specific quirk in virtex4 bitstream handling -- I don't have a virtex4 at hand, so I cannot really test whether the hardware is happy with this or not.
JB