Virtex2-Pro local clocking...

Yes.

Other than XAPP609, I know of: - the phantom XAPP769 for S3 local clocks - manual inspection in FPGA Editor - the perl script in Answer Record 17697 : How do you determine I/O locations for Local Clock Routing according to XAPP609?

Also, that DIFF_OUT buffer example code I posted a couple months ago had some local clocking notes in the comments.

The various flavor DRAM app notes may have a few more tidbits of information, since the local clocks are used for DQS-like signals.

Brian

For "Data Capture and Transfer" applications mentioned in tha app notes, you may want to take a look at ADEPT

The tool displays graphically which pins can be used for local clocks and which pins can be driven by a local clock pins.

HTH, Jim

Brian -

Thanks for the pointer to the Answer Record, unfortunately, the script dies on my machine with the following error:

FATAL_ERROR:StaticFileParsers:StaticAcdRead.c:614:1.48 - ACD file .acd does not exists Process will terminate. To resolve this error, please consult the Answers Database and other online resources at

If you need further assistance, please open a Webcase by clicking on the "WebCase" link at

Any ideas?

Thanks!

John Providenza

Brian Davis wrote:

I fixed the Xilinx script to solve its error. The script will not work after ISE 6.3. I had set my environment varibale to point to the my 6.2 install, but my PATH directory still pointed to the 8.1 binaries.

Because of this, the Perl script was executing the program 'partgen' from the 8.1 binaries instead of the 6.2 binaries. I changed the perl script in 2 spots to pre-pend a path based on the XILINX environment variable to the invocation of the partgen program.

Now I need to look at the output of the perl script...

John P

johnp wrote: