1. Home
  2. Field-Programmable Gate Arrays
  3. Virtex BRAM Configuration

Virtex BRAM Configuration

Hi Folks,

I am totally new to FPGA design, so excuse me if this doesn't make sense. Is it possible to configure the 18K Bram in Virtex II in a different way. For example as four different 512 deep blocks of 8- bits. What I want is FIFOs that are 512 deep and 8-bits wide, for my convolution core.

I read through the Xilinx application note xapp258 where FIFOs for

16k, 8k, 4k, 2k and 511 are mentioned and from that it is not clear if we can build FIFOs of different sizes.

And also are there any resources where i can get information about building FIFOs with BRAMs or distributed RAMS.

Thanks and regards Ramc

Reply to
RK
Loading thread data ...

formatting link

First hit is an spp note that can take you through much of what you need to know.

The BRAM memories are dual-port memories meaning you could change 1

18kbit dual-port memory into two independent 9kbit single-port memories but the only way to decompose into four independent 4k memories is to time-multiplex your access to the memory array. There's no way to turn one memory into 4 memories since that would require a four-port configuration; since FIFOs normally use both ports of a memory, an 8-port memory would even be needed. Yikes!

Typically FIFOs are built as one FIFO per BRAM.

- John_H

Reply to
John_H

No, the BRAMs only have two ports, so you can use them as two independent

1K*8 blocks.

Or you can add logic to time-multiplex them, to get more ports. You could effectively get four 512*8 blocks by using both ports and 2:1 time multiplexing.

Eric

Reply to
Eric Smith

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.